[ fixed $subject ] On 7/3/20 7:20 PM, Roger Sayle wrote: > > The following patch adds support for three-input addition instructions to the > nvptx backend. > The PTX ISA's "vadd.u32.u32.u32.add d, a, b, c" instruction effectively > implements 32-bit d = a+b+c, > and the "vsub.u32.u32.u32 d,a,b,c" instruction that provides 32-bit d = > (a-b)+c. The hope is that > these mnemonics help ptxas generate the low-level hardware's IADD3 > instruction. > > Tested by "make" and "make -k check" on --build=nvptx-none hosted on > x86_64-pc-linux-gnu > with no new regressions. > > [PATCH] nvptx: Add support for vadd.add and vsub.add instructions > > 2020-07-03 Roger Sayle <ro...@nextmovesoftware.com> > > gcc/ChangeLog: > * config/nvptx/nvptx.md (vadd_addsi4): New instruction. > (vsub_addsi4): New instruction. > > gcc/testsuite/ChangeLog: > * gcc.target/nvptx/vadd_add.c: New test. > * gcc.target/nvptx/vsub_add.c: New test. > > > Hopefully, I've got the patch/diff file format correct this time. > Ok for mainline? >
Hi Roger, the patch looks fine, please apply. I wonder though, AFAIU the define_insn names are not standard names, so could they be defined with the '*' prefix? If so, you could add that as well. Thanks, - Tom
