On Wed, Jun 24, 2020 at 09:35:42AM +0100, Richard Sandiford wrote:
> >> I keep meaning to experiment with dropping the second mode from these
> >> optabs,
> >> since it should be uniquely determined by the first. That would make
> >> things
> >> slightly simpler and more consistent with the other load/store IFNs. But
> >> as
> >> usual I've never found the time.
> >
> > AVX512 would have V16SImode and SImode because the mask would have
> > an integer mode? Likewise I could imagine RISC-V using V4SImode and
> > V4QImode
> > or however their mask registers look like.
>
> But what I mean is, once you know the vector mode, there should only
> be one “choice” of mask mode. (I agree it might not be the same mode,
> and isn't for SVE as well as AVX512.) TARGET_GET_MASK_MODE and related
> vectoriser masking code is based around the assumption that the mask
> mode is a function of the vector mode.
But on the same target the same vector mode (e.g. V16HImode) can have two
different mask modes (for AVX and non-AVX512VL V16HImode, for AVX512VL
HImode). It is true that better both shouldn't appear in the same function,
but it would be better if at least in the optabs it is clearly spelled out.
> This is similar to single-mode direct optabs like vec_pack and vec_unpack,
> which operate on pairs of vector modes, but where one mode is uniquely
> determined by the other.
For those IMHO it would be better to use two modes, otherwise it is a pain.
Jakub
