On Mon, Mar 23, 2020 at 07:46:17AM +0000, Yangfei (Felix) wrote:
> I think the problem here is how to make sure we are doing a ***equality***
> comparison with zero.
> We can only do the transformation under this condition.
> Then I see combine tries the following pattern:
>
> 173 Failed to match this instruction:
> 174 (set (reg:SI 101)
> 175 (ne:SI (and:SI (lshiftrt:SI (reg:SI 102)
> 176 (const_int 8 [0x8]))
> 177 (const_int 6 [0x6]))
> 178 (const_int 0 [0])))
Like I said, this should be simplified to
(set (reg:SI 10)
(ne:SI (and:SI (reg:SI 102)
(const_int 1536))
(const_int 0)))
> But this cannot match a 'tst' instruction as the above pattern does not
> clobber the CC flag register.
combine can (and will) add such clobbers itself, if the pattern matches
otherwise, so that is not an issue.
> > This should be simplified to
> > (set (reg:CC_NZ 66 cc)
> > (compare:CC_NZ (and:SI (reg:SI 103)
> > (const_int 1536))
> > (const_int 0)))
> > (but it isn't), and that is just *and<mode>3nr_compare0, which is a "tst"
> > instruction. If this is fixed (in simplify-rtx.c), it will work as you
> > want.
>
> But I don't think it's correct for logic in simplify-rtx.c to further
> simplify this rtl:
>
> (compare:CC_NZ (and:SI (lshiftrt:SI (reg:SI 102)
> (const_int 8 [0x8]))
> (const_int 6 [0x6]))
> (const_int 0 [0]))
> The reason is that it knows nothing about CC_NZ.
Yeah, maybe not in simplify-rtx.c, hrm. There is SELECT_CC_MODE for
these things, and combine knows about that (not many passes do).
Segher
