On Thu, Mar 19, 2020 at 01:43:40AM +0000, Yangfei (Felix) wrote:
> 2. Given that the patterns for ubfx and ubfiz are already not simple, I am
> afraid the pattern we got by combining the three would be much complex.
> And even more complex when further merged with insn 14 here in order to
> make sure that we are doing a equality comparison with zero.
It will be just as simple as with the other approach:
> > Another approach:
> >
> > Trying 7 -> 9:
> > 7: r99:SI=r103:SI>>0x8
> > REG_DEAD r103:SI
> > 9: cc:CC_NZ=cmp(r99:SI&0x6,0)
> > REG_DEAD r99:SI
> > Failed to match this instruction:
> > (set (reg:CC_NZ 66 cc)
> > (compare:CC_NZ (and:SI (lshiftrt:SI (reg:SI 103)
> > (const_int 8 [0x8]))
> > (const_int 6 [0x6]))
> > (const_int 0 [0])))
> >
> > This can be recognised as just that "tst" insn, no? But combine (or
> > simplify-rtx) should get rid of the shift here, just the "and" is simpler
> > after all (it
> > just needs to change the constant for that).
>
> No, this does not mean an equality comparison with zero. I have mentioned
> this in my previous mail.
This should be simplified to
(set (reg:CC_NZ 66 cc)
(compare:CC_NZ (and:SI (reg:SI 103)
(const_int 1536))
(const_int 0)))
(but it isn't), and that is just *and<mode>3nr_compare0, which is a
"tst" instruction. If this is fixed (in simplify-rtx.c), it will work
as you want.
Segher
