Hello,
This patch adds new machine specific option -malign-data={word,abi} to
RISC-V port. The option switches alignment of global variables and
constants of array/record/union types. The default value
(-malign-data=word) keeps existing way of alignment computation. Another
option value (-malign-data=abi) makes data natural alignment. It avoids
extra spaces between data to reduce code size. The measured code size
reduction is about 0.4% at -Os on EEMBC automotive 1.1 tests and
SPEC2006 C/C++ benchmarks. The patch was tested in riscv-gnu-toolchain
by dejagnu.
Please check the patch into the trunk.
Best regards,
Ilia.
gcc/
* config/riscv/riscv-opts.h (struct riscv_align_data): Added.
* config/riscv/riscv.c (riscv_constant_alignment): Use
riscv_align_data_type.
* config/riscv/riscv.h (DATA_ALIGNMENT): Use riscv_align_data_type.
(LOCAL_ALIGNMENT): Set to old DATA_ALIGNMENT value.
* config/riscv/riscv.opt (malign-data): New.
* doc/invoke.texi (RISC-V Options): Document -malign-data=.From c183fbefb9b7b53eb066cbfdaa907b6087271029 Mon Sep 17 00:00:00 2001
From: Ilia Diachkov <ilia.diach...@optimitech.com>
Date: Wed, 26 Jun 2019 01:33:20 +0300
Subject: [PATCH] RISC-V: Add -malign-data= option.
---
gcc/config/riscv/riscv-opts.h | 5 +++++
gcc/config/riscv/riscv.c | 3 ++-
gcc/config/riscv/riscv.h | 10 +++++++---
gcc/config/riscv/riscv.opt | 14 ++++++++++++++
gcc/doc/invoke.texi | 10 +++++++++-
5 files changed, 37 insertions(+), 5 deletions(-)
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index f3031f2..c1f7fa1 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -46,4 +46,9 @@ enum riscv_microarchitecture_type {
};
extern enum riscv_microarchitecture_type riscv_microarchitecture;
+enum riscv_align_data {
+ riscv_align_data_type_word,
+ riscv_align_data_type_abi
+};
+
#endif /* ! GCC_RISCV_OPTS_H */
diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index d61455f..08418ce 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -4904,7 +4904,8 @@ riscv_can_change_mode_class (machine_mode, machine_mode, reg_class_t rclass)
static HOST_WIDE_INT
riscv_constant_alignment (const_tree exp, HOST_WIDE_INT align)
{
- if (TREE_CODE (exp) == STRING_CST || TREE_CODE (exp) == CONSTRUCTOR)
+ if ((TREE_CODE (exp) == STRING_CST || TREE_CODE (exp) == CONSTRUCTOR)
+ && (riscv_align_data_type == riscv_align_data_type_word))
return MAX (align, BITS_PER_WORD);
return align;
}
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index 8856cee..bace9d9 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -181,7 +181,8 @@ along with GCC; see the file COPYING3. If not see
that copy constants to character arrays can be done inline. */
#define DATA_ALIGNMENT(TYPE, ALIGN) \
- ((((ALIGN) < BITS_PER_WORD) \
+ (((riscv_align_data_type == riscv_align_data_type_word) \
+ && ((ALIGN) < BITS_PER_WORD) \
&& (TREE_CODE (TYPE) == ARRAY_TYPE \
|| TREE_CODE (TYPE) == UNION_TYPE \
|| TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
@@ -190,8 +191,11 @@ along with GCC; see the file COPYING3. If not see
character arrays to be word-aligned so that `strcpy' calls that copy
constants to character arrays can be done inline, and 'strcmp' can be
optimised to use word loads. */
-#define LOCAL_ALIGNMENT(TYPE, ALIGN) \
- DATA_ALIGNMENT (TYPE, ALIGN)
+#define LOCAL_ALIGNMENT(TYPE, ALIGN) \
+ ((((ALIGN) < BITS_PER_WORD) \
+ && (TREE_CODE (TYPE) == ARRAY_TYPE \
+ || TREE_CODE (TYPE) == UNION_TYPE \
+ || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
/* Define if operations between registers always perform the operation
on the full register even if a narrower mode is specified. */
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index 3b25f9a..a9b8ab5 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -131,3 +131,17 @@ Mask(RVE)
mriscv-attribute
Target Report Var(riscv_emit_attribute_p) Init(-1)
Emit RISC-V ELF attribute.
+
+malign-data=
+Target RejectNegative Joined Var(riscv_align_data_type) Enum(riscv_align_data) Init(riscv_align_data_type_word)
+Use the given data alignment.
+
+Enum
+Name(riscv_align_data) Type(enum riscv_align_data)
+Known data alignment choices (for use with the -malign-data= option):
+
+EnumValue
+Enum(riscv_align_data) String(word) Value(riscv_align_data_type_word)
+
+EnumValue
+Enum(riscv_align_data) String(abi) Value(riscv_align_data_type_abi)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 50e50e3..55c08b3 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1059,7 +1059,8 @@ See RS/6000 and PowerPC Options.
-mcmodel=medlow -mcmodel=medany @gol
-mexplicit-relocs -mno-explicit-relocs @gol
-mrelax -mno-relax @gol
--mriscv-attribute -mmo-riscv-attribute}
+-mriscv-attribute -mmo-riscv-attribute @gol
+-malign-data=@var{type}}
@emph{RL78 Options}
@gccoptlist{-msim -mmul=none -mmul=g13 -mmul=g14 -mallregs @gol
@@ -23881,6 +23882,13 @@ linker relaxations.
@itemx -mno-emit-attribute
Emit (do not emit) RISC-V attribute to record extra information into ELF
objects. This feature requires at least binutils 2.32.
+
+@item -malign-data=@var{type}
+@opindex malign-data
+Control how GCC aligns variables and constants of array, structure or union
+types. Supported values for @var{type} are @samp{word} may increase alignment
+to one machine word, @samp{abi} uses alignment value as specified by the ABI.
+@samp{word} is the default.
@end table
@node RL78 Options
--
1.8.3.1
