On Sun, Feb 10, 2019 at 10:01 PM H.J. Lu <hjl.to...@gmail.com> wrote:
>
> On Sun, Feb 10, 2019 at 2:36 AM Uros Bizjak <ubiz...@gmail.com> wrote:
> >
> > On 2/10/19, H.J. Lu <hjl.to...@gmail.com> wrote:
> > > Emulate MMX vec_dupv2si with SSE. Only SSE register source operand is
> > > allowed.
> > >
> > > PR target/89021
> > > * config/i386/mmx.md (*vec_dupv2si): Changed to
> > > define_insn_and_split and also allow TARGET_MMX_WITH_SSE to
> > > support SSE emulation.
> > > * config/i386/sse.md (*vec_dupv4si): Renamed to ...
> > > (vec_dupv4si): This.
> > > ---
> > > gcc/config/i386/mmx.md | 27 ++++++++++++++++++++-------
> > > gcc/config/i386/sse.md | 2 +-
> > > 2 files changed, 21 insertions(+), 8 deletions(-)
> > >
> > > diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
> > > index d360e97c98b..1ee51c5deb7 100644
> > > --- a/gcc/config/i386/mmx.md
> > > +++ b/gcc/config/i386/mmx.md
> > > @@ -1420,14 +1420,27 @@
> > > (set_attr "length_immediate" "1")
> > > (set_attr "mode" "DI")])
> > >
> > > -(define_insn "*vec_dupv2si"
> > > - [(set (match_operand:V2SI 0 "register_operand" "=y")
> > > +(define_insn_and_split "*vec_dupv2si"
> > > + [(set (match_operand:V2SI 0 "register_operand" "=y,x,Yv")
> > > (vec_duplicate:V2SI
> > > - (match_operand:SI 1 "register_operand" "0")))]
> > > - "TARGET_MMX"
> > > - "punpckldq\t%0, %0"
> > > - [(set_attr "type" "mmxcvt")
> > > - (set_attr "mode" "DI")])
> > > + (match_operand:SI 1 "register_operand" "0,0,Yv")))]
> > > + "TARGET_MMX || TARGET_MMX_WITH_SSE"
> > > + "@
> > > + punpckldq\t%0, %0
> > > + #
> > > + #"
> > > + "&& reload_completed && TARGET_MMX_WITH_SSE"
> >
> > Please fix above.
>
> I will use
>
> "TARGET_MMX_WITH_SSE && reload_completed"
>
> > > + [(const_int 0)]
> > > +{
> > > + /* Emulate MMX vec_dupv2si with SSE vec_dupv4si. */
> > > + rtx op0 = gen_rtx_REG (V4SImode, REGNO (operands[0]));
> > > + rtx insn = gen_vec_dupv4si (op0, operands[1]);
> > > + emit_insn (insn);
> > > + DONE;
> >
> > Please write this simple RTX explicitly in the place of (const_int 0) above.
>
> rtx insn = gen_vec_dupv4si (op0, operands[1]);
>
> is easy. How do I write
>
> rtx op0 = gen_rtx_REG (V4SImode, REGNO (operands[0]));
>
> in place of (const_int 0)?
[(set (match_dup 2)
(vec_duplicate:V4SI (match_dup 1)))]
with
"operands[2] = gen_rtx_REG (V4SImode, REGNO (operands[0]));"
or even better:
"operands[2] = gen_lowpart (V4SImode, operands[0]);"
in the preparation statement.
Uros.
