Hi all,

In GCC 9 the aarch64 port learned how to do V16QImode SAD operations on signed 
and unsigned chars.
But I had missed enabling the effective target for that.
This patch enables that target for non-SVE aarch64.
Two new tests now PASS on aarch64:
gcc.dg/vect/slp-reduc-sad.c
gcc.dg/vect/vect-reduc-sad.c

Ok for trunk?

Thanks,
Kyrill

P.S. I notice that powerpc and mips also implement the necessary optabs.
Perhaps the maintainers would like to check that the tests above pass on their 
appropriate (sub)targets and
enable this effective target appropriately.

2018-12-18  Kyrylo Tkachov  <kyrylo.tkac...@arm.com>

    * lib/target-supports.exp (check_effective_target_vect_usad_char):
    Add non-SVE aarch64 to supported list.
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 5026c5906cd..76779ff7d70 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -5925,7 +5925,10 @@ proc check_effective_target_vect_udot_hi { } {
 
 proc check_effective_target_vect_usad_char { } {
     return [check_cached_effective_target_indexed vect_usad_char {
-      expr { [istarget i?86-*-*] || [istarget x86_64-*-*] }}]
+      expr { [istarget i?86-*-*]
+	      || [istarget x86_64-*-*]
+	      || ([istarget aarch64*-*-*]
+		  && ![check_effective_target_aarch64_sve])}}]
 }
 
 # Return 1 if the target plus current options supports both signed

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