> I can see why WORD_REGISTER_OPERATIONS allows some REG cases,
> but why does LOAD_EXTEND_OP have an effect on them?
LOAD_EXTEND_OP has an effect on all paradoxical SUBREGs because of spilling.
This was even originally decoupled from WORD_REGISTER_OPERATIONS in reload,
see this comment from find_reloads:
On machines that extend byte operations and we have a
SUBREG where both the inner and outer modes are no
wider
than a word and the inner mode is narrower, is
integral,
and gets extended when loaded from memory, combine.c
has
made assumptions about the behavior of the machine in
such
register access. If the data is, in fact, in memory we
must always load using the size assumed to be in the
register and let the insn do the different-sized
accesses.
This is doubly true if WORD_REGISTER_OPERATIONS. In
this case eliminate_regs has left non-paradoxical
subregs for push_reload to see. Make sure it does
by forcing the reload.
> Ah well. I guess I'm just glad that AArch64 doesn't define this :-)
Nothing even remotely approaching the complexity of the SVE stuff... ;-)
--
Eric Botcazou
