> we add this new constraint as: > > ;; We need a special memory constraint for the misaligned memory access > ;; This is only for TARGET_MISALIGN target > (define_special_memory_constraint "B" > "Memory reference whose address is misaligned" > (and (match_code "mem") > (match_test "TARGET_MISALIGN") > (match_test "memory_is_misaligned (op, mode)”))) > > the routine “memory_is_misaligned” is a compile-time check to see whether > the address is known to be misaligned or not. only for compile-time KNOWN > misaligned memory access, we will use misaligned load/store insns provided > by the new processor for the memory access. > > and then put this new constraints to sparc.md as: > > (define_insn "*movdi_insn_sp64" > [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,r, B, m, > r,*e,?*e,?*e,?W,b,b") (match_operand:DI 1 "input_operand" > "rI,N,B,m,rJ,rJ,*e, r, *e, W,*e,J,P"))] > > > NOTE, the 4th constraints for this insn is “B, rJ”, if the operands match > this constraint, then. misaligned store insns will be generated for the > misaligned memory access instead of regular store.
OK, but what happens in the end? What's the failure mode? Internal compiler error, impossible reloading, wrong code, suboptimal code, etc? -- Eric Botcazou
