thanks for the replying.

> On Jul 11, 2017, at 2:44 AM, Eric Botcazou <ebotca...@adacore.com> wrote:
> 
>> From the above doc, the major difference between a memory_constraint and a
>> special_memory_constraint is:  whether "reload can or cannot make them match
>> by reloading the address".
> 
> Right, i.e. by just changing the form of the address (instead of the address 
> itself).
> 
>> For memory_constraint,  the reload is Okay, however, for
>> special_memory_constraint, the reload is NOT Okay.
>> 
>> I am not sure whether the RELOAD includes Spill or not, if it is, then the
>> current handling of special_memory_constraint is NOT correct:
>> (lra-constraints.c)
>> 
>> 2088                     case CT_SPECIAL_MEMORY:
>> 2089                       if (MEM_P (op)
>> 2090                           && satisfies_memory_constraint_p (op, cn))
>> 2091                         win = true;
>> 2092                       else if (spilled_pseudo_p (op))
>> 2093                         win = true;
>> 2094                       break;
>> 
>> line 2092-2093 permits the memory spill, which seems need to be avoided for
>> SPECIAL_MEMORY_Constraint.
>> 
>> the thing I need to confirm is:
>> 
>> whether “spill” is considered as RELOAD or NOT?
> 
> Yes, spilling is part of reloading but is not reloading the address since 
> it's 
> changing the address, so I think it's OK.  Why is that problematic for you?

the problem I had is:

1. we added a new special_memory_constraint for misaligned memory access,  one 
important requirement
for this new special_memory_constraint is, the address of the memory access is 
misaligned.

2. per the current code in lra-constraints.c:

2286                     case CT_SPECIAL_MEMORY:
2287                       if (MEM_P (op)
2288                           && satisfies_memory_constraint_p (op, cn))
2289                         win = true;
2290                       else if (spilled_pseudo_p (op))
2291                         win = true;
2292                       break;

if the op is a pseudo_p that can be spilled, then it's treated as a
PERFECT MATCH.

the issue only can be exposed by the following kind of RTL:

(insn 34 13 14 2 (set (reg:DI 122)
       (reg:DI 129)) misalign-3.c:12 125 {*movdi_insn_sp64}
    (nil))

i.e.
        (1). REG2 move to REG1
and. (2). REG2 is a virtual reg (> the max hard regno, on Sparc, its 103),
therefore, must be spilled to stack.

the current interpretation of special memory treat such REG2 as a perfect
match to special memory,  and then spill it.
however, such spilled memory RTL is NOT match the MISALIGN requirement, (i.e, 
the address of the memory
access for the spilled RTL is not misaligned)

therefore triggered the failure later.

That’s the reason I tracked down to this potential issue in the handling of 
“CT_SPECIAL_MEMORY”.

thanks a lot.

Qing


> -- 
> Eric Botcazou

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