Hi,
  This patch adds -mcpu=thunderx2t99.  Cavium has acquired the Vulcan
IP from Broadcom.  I am keeping the old -mcpu=vulcan as backwards
compatible but renaming all of the structures to be based on the new
name of the chip.  In the next few weeks, I am auditing the current
tuning and will be posting some changes too.

OK?  Bootstrapped and tested on aarch64-linux-gnu with no regressions.
Also tested -mcpu=native on a ThunderX2 CN99xx machine.

Thanks,
Andrew

ChangeLog:
* config/aarch64/aarch64-cores.def: Add thunderx2t99.  Change vulcan
to reference thunderx2t99 for the tuning structure
* config/aarch64/aarch64-cost-tables.h (vulcan_extra_costs): Rename to ...
(thunderx2t99_extra_costs): This.
* config/aarch64/aarch64-tune.md: Regenerate.
* config/aarch64/aarch64.c (vulcan_addrcost_table): Rename to ...
(vulcan_addrcost_table): This.
(vulcan_regmove_cost): Rename to ...
(thunderx2t99_regmove_cost): This.
(vulcan_vector_cost): Rename to ...
(thunderx2t99_vector_cost): this.
(vulcan_branch_cost): Rename to ...
(thunderx2t99_branch_cost): This.
(vulcan_tunings): Rename to ...
(thunderx2t99_tunings): This and s/vulcan/thunderx2t99 .
* doc/invoke.texi (AARCH64/mtune): Add thunderx2t99.
Index: gcc/config/aarch64/aarch64-cores.def
===================================================================
--- gcc/config/aarch64/aarch64-cores.def        (revision 243968)
+++ gcc/config/aarch64/aarch64-cores.def        (working copy)
@@ -74,7 +74,8 @@ AARCH64_CORE("xgene1",      xgene1,    x
 /* V8.1 Architecture Processors.  */
 
 /* Broadcom ('B') cores. */
-AARCH64_CORE("vulcan",  vulcan, cortexa57, 8_1A,  AARCH64_FL_FOR_ARCH8_1 | 
AARCH64_FL_CRYPTO, vulcan, 0x42, 0x516, -1)
+AARCH64_CORE("thunderx2t99",  thunderx2t99, cortexa57, 8_1A,  
AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, thunderx2t99, 0x42, 0x516, -1)
+AARCH64_CORE("vulcan",  vulcan, cortexa57, 8_1A,  AARCH64_FL_FOR_ARCH8_1 | 
AARCH64_FL_CRYPTO, thunderx2t99, 0x42, 0x516, -1)
 
 /* V8 big.LITTLE implementations.  */
 
Index: gcc/config/aarch64/aarch64-cost-tables.h
===================================================================
--- gcc/config/aarch64/aarch64-cost-tables.h    (revision 243968)
+++ gcc/config/aarch64/aarch64-cost-tables.h    (working copy)
@@ -127,7 +127,7 @@ const struct cpu_cost_table thunderx_ext
   }
 };
 
-const struct cpu_cost_table vulcan_extra_costs =
+const struct cpu_cost_table thunderx2t99_extra_costs =
 {
   /* ALU */
   {
Index: gcc/config/aarch64/aarch64-tune.md
===================================================================
--- gcc/config/aarch64/aarch64-tune.md  (revision 243968)
+++ gcc/config/aarch64/aarch64-tune.md  (working copy)
@@ -1,5 +1,5 @@
 ;; -*- buffer-read-only: t -*-
 ;; Generated automatically by gentune.sh from aarch64-cores.def
 (define_attr "tune"
-       
"cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,exynosm1,falkor,qdf24xx,thunderx,thunderxt88p1,thunderxt88,thunderxt81,thunderxt83,xgene1,vulcan,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53"
+       
"cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,exynosm1,falkor,qdf24xx,thunderx,thunderxt88p1,thunderxt88,thunderxt81,thunderxt83,xgene1,thunderx2t99,vulcan,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53"
        (const (symbol_ref "((enum attr_tune) aarch64_tune)")))
Index: gcc/config/aarch64/aarch64.c
===================================================================
--- gcc/config/aarch64/aarch64.c        (revision 243968)
+++ gcc/config/aarch64/aarch64.c        (working copy)
@@ -268,7 +268,7 @@ static const struct cpu_addrcost_table q
   0 /* imm_offset  */
 };
 
-static const struct cpu_addrcost_table vulcan_addrcost_table =
+static const struct cpu_addrcost_table thunderx2t99_addrcost_table =
 {
     {
       0, /* hi  */
@@ -351,7 +351,7 @@ static const struct cpu_regmove_cost qdf
   4 /* FP2FP  */
 };
 
-static const struct cpu_regmove_cost vulcan_regmove_cost =
+static const struct cpu_regmove_cost thunderx2t99_regmove_cost =
 {
   1, /* GP2GP  */
   /* Avoid the use of int<->fp moves for spilling.  */
@@ -450,7 +450,7 @@ static const struct cpu_vector_cost xgen
 };
 
 /* Costs for vector insn classes for Vulcan.  */
-static const struct cpu_vector_cost vulcan_vector_cost =
+static const struct cpu_vector_cost thunderx2t99_vector_cost =
 {
   6, /* scalar_stmt_cost  */
   4, /* scalar_load_cost  */
@@ -482,7 +482,7 @@ static const struct cpu_branch_cost cort
 };
 
 /* Branch costs for Vulcan.  */
-static const struct cpu_branch_cost vulcan_branch_cost =
+static const struct cpu_branch_cost thunderx2t99_branch_cost =
 {
   1,  /* Predictable.  */
   3   /* Unpredictable.  */
@@ -768,13 +768,13 @@ static const struct tune_params qdf24xx_
   (AARCH64_EXTRA_TUNE_NONE)            /* tune_flags.  */
 };
 
-static const struct tune_params vulcan_tunings =
+static const struct tune_params thunderx2t99_tunings =
 {
-  &vulcan_extra_costs,
-  &vulcan_addrcost_table,
-  &vulcan_regmove_cost,
-  &vulcan_vector_cost,
-  &vulcan_branch_cost,
+  &thunderx2t99_extra_costs,
+  &thunderx2t99_addrcost_table,
+  &thunderx2t99_regmove_cost,
+  &thunderx2t99_vector_cost,
+  &thunderx2t99_branch_cost,
   &generic_approx_modes,
   4, /* memmov_cost.  */
   4, /* issue_rate.  */
Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi (revision 243968)
+++ gcc/doc/invoke.texi (working copy)
@@ -13973,8 +13973,9 @@ performance of the code.  Permissible va
 @samp{cortex-a72}, @samp{cortex-a73}, @samp{exynos-m1}, @samp{falkor},
 @samp{qdf24xx}, @samp{xgene1}, @samp{vulcan}, @samp{thunderx},
 @samp{thunderxt88}, @samp{thunderxt88p1}, @samp{thunderxt81},
-@samp{thunderxt83}, @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
-@samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53}, @samp{native}.
+@samp{thunderxt83}, @samp{thunderx2t99}, @samp{cortex-a57.cortex-a53},
+@samp{cortex-a72.cortex-a53}, @samp{cortex-a73.cortex-a35},
+@samp{cortex-a73.cortex-a53}, @samp{native}.
 
 The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
 @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53}

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