The attached change fixes an obscure reload problem compiling hash.c in
racket-6.7. This occurs
when we to load the address of a DFmode MEM with a scaled-indexed address to
integer registers.
Although we prefer ASHIFT to MULT, MULT is still used in memory addresses and
we need to handle
this form either directly as an insn pattern or as a secondary reload.
Tested on hppa-unknown-linux-gnu and hppa64-hp-hpux11.11. Committed to trunk
and gcc-6 branch.
Dave
--
John David Anglin dave.ang...@bell.net
2016-11-01 John David Anglin <dang...@gcc.gnu.org>
PR target/78166
* config/pa/pa.md: Add new shift/add patterns to handle
(plus (mult (reg) (mem_shadd_operand)) (reg)) source operand.
Index: config/pa/pa.md
===================================================================
--- config/pa/pa.md (revision 241690)
+++ config/pa/pa.md (working copy)
@@ -6249,6 +6249,21 @@
(set_attr "length" "4")])
(define_insn ""
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (plus:SI (mult:SI (match_operand:SI 2 "register_operand" "r")
+ (match_operand:SI 3 "mem_shadd_operand" ""))
+ (match_operand:SI 1 "register_operand" "r")))]
+ ""
+ "*
+{
+ int shift_val = exact_log2 (INTVAL (operands[3]));
+ operands[3] = GEN_INT (shift_val);
+ return \"{sh%o3addl %2,%1,%0|shladd,l %2,%o3,%1,%0}\";
+}"
+ [(set_attr "type" "binary")
+ (set_attr "length" "4")])
+
+(define_insn ""
[(set (match_operand:DI 0 "register_operand" "=r")
(plus:DI (ashift:DI (match_operand:DI 2 "register_operand" "r")
(match_operand:DI 3 "shadd_operand" ""))
@@ -6258,6 +6273,21 @@
[(set_attr "type" "binary")
(set_attr "length" "4")])
+(define_insn ""
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (plus:DI (mult:DI (match_operand:DI 2 "register_operand" "r")
+ (match_operand:DI 3 "mem_shadd_operand" ""))
+ (match_operand:DI 1 "register_operand" "r")))]
+ "TARGET_64BIT"
+ "*
+{
+ int shift_val = exact_log2 (INTVAL (operands[3]));
+ operands[3] = GEN_INT (shift_val);
+ return \"shladd,l %2,%o3,%1,%0\";
+}"
+ [(set_attr "type" "binary")
+ (set_attr "length" "4")])
+
(define_expand "ashlsi3"
[(set (match_operand:SI 0 "register_operand" "")
(ashift:SI (match_operand:SI 1 "lhs_lshift_operand" "")
