On Mon, Aug 01, 2016 at 06:37:42PM -0400, Michael Meissner wrote: > One further optimization would be to add support for constant element extracts > if the vector is currently in GPRs rather than vector registers on 64-bit > systems. I'm not sure if it would be a win in general, or if it would cause > the register allocators to generate more moves between the GPR and vector > register banks.
I don't know if it'll help either, you'll have to try it to make sure. I don't think it will be terribly important, either way. One nit: > ;; Extraction of a single element in a small integer vector. None of the > small > ;; types are currently allowed in a vector register, so we extract to a > DImode > ;; and either do a direct move or store. > -(define_insn_and_split "vsx_extract_<mode>" > +(define_expand "vsx_extract_<mode>" > + [(parallel [(set (match_operand:<VS_scalar> 0 "nonimmediate_operand" "") > + (vec_select:<VS_scalar> > + (match_operand:VSX_EXTRACT_I 1 "gpc_reg_operand" "") > + (parallel [(match_operand:QI 2 "const_int_operand" "")]))) > + (clobber (match_dup 3))])] Drop the superfluous ""s? And the predicates are never used either I think? This is okay for trunk. Thanks, Segher
