On Sat, Jul 30, 2016 at 11:29:25AM -0400, Michael Meissner wrote: > This patch adds better support for optimizing vec_extract of vector double or > vector long on 64-bit machines with direct move when the vector is in memory.
> I have tested this on a big endian power7 system (both 32-bit and 64-bit > tests), a big endian power8 system (only 64-bit tests), and a little endian > 64-bit system with bootstrap builds and no regressions. Can I apply these > patches to the trunk? Yes please. Some nits below. > I have one more patch to go in the vec_extract series, that will add similar > optimizations to vector float, vector int, vector short, and vector char > vectors. Looking forward to it! > --- gcc/config/rs6000/rs6000.c > (.../svn+ssh://meiss...@gcc.gnu.org/svn/gcc/trunk/gcc/config/rs6000) > (revision 238892) > +++ gcc/config/rs6000/rs6000.c (.../gcc/config/rs6000) (working copy) > @@ -7001,6 +7001,164 @@ rs6000_expand_vector_extract (rtx target > emit_move_insn (target, adjust_address_nv (mem, inner_mode, 0)); > } > > +/* Adjust a memory address (MEM) of a vector type to point to a scalar field > + within the vector (ELEMENT) with a type (SCALAR_TYPE). Use a base > register Mode, not type (and SCALAR_MODE).. > + /* Vector addresses should not have PRE_INC, PRE_DEC, or PRE_MODIFY. */ > + gcc_assert (GET_RTX_CLASS (GET_CODE (addr)) != RTX_AUTOINC); > + Stray space on this last line? > @@ -7024,7 +7193,7 @@ rs6000_split_vec_extract_var (rtx dest, > /* For little endian, adjust element ordering. For V2DI/V2DF, we can > use > an XOR, otherwise we need to subtract. The shift amount is so VSLO > will shift the element into the upper position (adding 3 to convert a > - byte shift into a bit shift). */ > + byte shift into a bit shift). */ Let's not :-) Thanks, Segher
