[PATCH] Fix pextr{b,w} with -masm=intel (PR target/70049)

[Jakub Jelinek]

Hi!

Like the recent patch for kmovw, vpextr{b,w} is another instruction
with output being r32/m{8,16} rather than r32/m32, so we shouldn't use %k0
for "m" constraint.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2016-03-02  Jakub Jelinek  <ja...@redhat.com>

        PR target/70049
        * config/i386/sse.md (*vec_extract<mode>): Use %k0 instead of %0
        if the operand is "m".

        * gcc.target/i386/pr70049.c: New test.

--- gcc/config/i386/sse.md.jj   2016-02-19 14:42:07.000000000 +0100
+++ gcc/config/i386/sse.md      2016-03-02 18:15:51.950982743 +0100
@@ -13307,7 +13307,9 @@ (define_insn "*vec_extract<mode>"
          (parallel
            [(match_operand:SI 2 "const_0_to_<ssescalarnummask>_operand")])))]
   "TARGET_SSE2"
-  "%vpextr<ssemodesuffix>\t{%2, %1, %k0|%k0, %1, %2}"
+  "@
+   %vpextr<ssemodesuffix>\t{%2, %1, %k0|%k0, %1, %2}
+   %vpextr<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "isa" "*,sse4")
    (set_attr "type" "sselog1")
    (set_attr "prefix_data16" "1")
--- gcc/testsuite/gcc.target/i386/pr70049.c.jj  2016-03-02 18:18:36.413730956 
+0100
+++ gcc/testsuite/gcc.target/i386/pr70049.c     2016-03-02 18:20:08.194474318 
+0100
@@ -0,0 +1,20 @@
+/* PR target/70049 */
+/* { dg-do assemble { target avx } } */
+/* { dg-require-effective-target masm_intel } */
+/* { dg-options "-Og -mavx -masm=intel" } */
+
+typedef unsigned short A;
+typedef unsigned short B __attribute__ ((vector_size (32)));
+typedef unsigned int C;
+typedef unsigned int D __attribute__ ((vector_size (32)));
+typedef unsigned long long E;
+typedef unsigned long long F __attribute__ ((vector_size (32)));
+
+C
+foo(A a, C b, E c, F d, B e, D f, F g)
+{
+  b <<= 28;
+  e[1] += b;
+  d %= (F) { 0, f[4] } | 1;
+  return a + b + c + d[3] + e[1] + g[3];
+}

        Jakub