On 15/01/16 12:40, Claudiu Zissulescu wrote:
(arc_save_restore): Use double load/store instruction.
(arc_expand_movmem): Likewise.
> if (n_pieces >= (unsigned int) (optimize_size ? 3 : 15))
> return false;
> - if (piece > 4)
> + if (TARGET_LL64 && (piece != 8) && (align >= 4))
> + piece = 8;
> + else if (piece > 4)
> piece = 4;
> dst_addr = force_offsettable (XEXP (operands[0], 0), size, 0);
That bit doesn't make sense to me.
Assume the alignment is 8. Thus, piece becomes 8 too. Then the
above conditional gets processed, and it sets piece to 4.
I think instead of "(piece != 8) && (align >= 4)" it should be:
"(piece >= 8)"
* config/arc/arc.md (*movdi_insn): Emit ldd/std instructions.
> - "&& reload_completed && optimize"
> - [(set (match_dup 2) (match_dup 3)) (set (match_dup 4) (match_dup 5))]
> - "arc_split_move (operands);"
> + "reload_completed"
> + [(match_dup 2)]
> + "operands[2] = arc_split_move (operands);"
arc_split_move uses, inter alia, operands[2]..operands[[5].
Thus, it is not save to stop mentioning these in the pattern.
(*movdf_insn): Likewise.
Likewise.
When you say 'basic support', I suppose you have a plan to re-visit this
later to get the register allocator to use
register pairs, and stop regrename breaking them up?
