Please find attached a patch that adds basic support for double load/store 
instructions present in archs processors.

Ok to apply?

//Claudiu

gcc/
2015-01-15  Claudiu Zissulescu  <claz...@synopsys.com>

        * config/arc/arc.c (TARGET_DWARF_REGISTER_SPAN): Define.
        (arc_init): Check validity mll64 option.
        (arc_save_restore): Use double load/store instruction.
        (arc_expand_movmem): Likewise.
        (arc_split_move): Don't split if we have double load/store
        instructions.
        (arc_dwarf_register_span): New function.
        * config/arc/arc.h (TARGET_CPU_CPP_BUILTINS): Define __ARC_LL64__.
        * config/arc/arc.md (*movdi_insn): Emit ldd/std instructions.
        (*movdf_insn): Likewise.
        * config/arc/arc.opt (mll64): New option.
        * config/arc/predicates.md (even_register_operand): New predicate.

Attachment: 0001-ARC-Add-basic-support-for-double-load-and-store-inst.patch
Description: 0001-ARC-Add-basic-support-for-double-load-and-store-inst.patch

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