This patch adds support for rtx costing of CCMP. The cost is the same as
int/FP compare, however comparisons with zero get a slightly larger cost.
This means we prefer emitting compares with zero so they can be merged with
ALU operations.
OK for commit?
ChangeLog:
2015-11-13 Wilco Dijkstra <wdijk...@arm.com>
* gcc/config/aarch64/aarch64.c (aarch64_if_then_else_costs):
Add support for CCMP costing.
---
gcc/config/aarch64/aarch64.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index a224982..b789841 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -5638,6 +5638,26 @@ aarch64_if_then_else_costs (rtx op0, rtx op1, rtx
op2, int *cost, bool speed)
}
else if (GET_MODE_CLASS (GET_MODE (inner)) == MODE_CC)
{
+ /* CCMP. */
+ if ((GET_CODE (op1) == COMPARE) && CONST_INT_P (op2))
+ {
+ /* Increase cost of CCMP reg, 0, imm, CC to prefer CMP reg, 0. */
+ if (XEXP (op1, 1) == const0_rtx)
+ *cost += 1;
+ if (speed)
+ {
+ machine_mode mode = GET_MODE (XEXP (op1, 0));
+ const struct cpu_cost_table *extra_cost
+ = aarch64_tune_params.insn_extra_cost;
+
+ if (GET_MODE_CLASS (mode) == MODE_INT)
+ *cost += extra_cost->alu.arith;
+ else
+ *cost += extra_cost->fp[mode == DFmode].compare;
+ }
+ return true;
+ }
+
/* It's a conditional operation based on the status flags,
so it must be some flavor of CSEL. */
--
1.9.1
