On Fri, Oct 16, 2015 at 8:43 AM, Uros Bizjak <[email protected]> wrote:
> On Thu, Oct 15, 2015 at 9:30 PM, Uros Bizjak <[email protected]> wrote:
>
>>>>> Do we support -O2 -march=lakemont with
>>>>>
>>>>> __attribute__((target("arch=silvermont")))
>>>>
>>>> Hm, no.
>>>>
>>>
>>> Do we issue an error or silently ignore
>>> __attribute__((target("arch=silvermont")))?
>>> If we don't support it, should we support
>>>
>>> -O2 -march=silvermont
>>>
>>> __attribute__((target("arch=lakemont")))
>>
>> Actually, we have to re-initialize:
>>
>> opts->x_target_flags
>> |= (TARGET_DEFAULT | TARGET_SUBTARGET_DEFAULT) &
>> ~opts_set->x_target_flags;
>>
>> just before TARGET_SUBTARGET{32,64}_DEFAULT processing, and it will work.
>
> No, this won't work. The value of MASK_NO_FANCY_MATH depend on
> MASK_80387setting, and once fancy math bit is set, it couldn't be
> cleared for march != lakemont.
>
> It looks just like we want to error out when lakemont is enabled with -m80387.
Like in the attached patch, that also slightly improves existing error
reporting.
Uros.
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c (revision 228863)
+++ config/i386/i386.c (working copy)
@@ -4949,16 +4949,30 @@ ix86_option_override_internal (bool main_args_p,
{
/* Verify that x87/MMX/SSE/AVX is off for -miamcu. */
if (TARGET_80387_P (opts->x_target_flags))
- sorry ("X87 FPU isn%'t supported in Intel MCU psABI");
- else if ((opts->x_ix86_isa_flags & (OPTION_MASK_ISA_MMX
- | OPTION_MASK_ISA_SSE
- | OPTION_MASK_ISA_AVX)))
- sorry ("%s isn%'t supported in Intel MCU psABI",
- TARGET_MMX_P (opts->x_ix86_isa_flags)
- ? "MMX"
- : TARGET_SSE_P (opts->x_ix86_isa_flags) ? "SSE" : "AVX");
+ sorry ("X87 FPU is not supported in Intel MCU psABI");
+ if ((opts->x_ix86_isa_flags & (OPTION_MASK_ISA_MMX
+ | OPTION_MASK_ISA_SSE
+ | OPTION_MASK_ISA_AVX)))
+ sorry ("%s is not supported in Intel MCU psABI",
+ TARGET_AVX_P (opts->x_ix86_isa_flags)
+ ? "AVX"
+ : TARGET_SSE_P (opts->x_ix86_isa_flags) ? "SSE" : "MMX");
}
+ if (ix86_arch == PROCESSOR_LAKEMONT)
+ {
+ /* Verify that x87/MMX/SSE/AVX is off for -march=lakemont. */
+ if (TARGET_80387_P (opts->x_target_flags))
+ error ("X87 FPU is not supported on Lakemont CPU");
+ if ((opts->x_ix86_isa_flags & (OPTION_MASK_ISA_MMX
+ | OPTION_MASK_ISA_SSE
+ | OPTION_MASK_ISA_AVX)))
+ error ("%s is not supported on Lakemont CPU",
+ TARGET_AVX_P (opts->x_ix86_isa_flags)
+ ? "AVX"
+ : TARGET_SSE_P (opts->x_ix86_isa_flags) ? "SSE" : "MMX");
+ }
+
if (!strcmp (opts->x_ix86_arch_string, "generic"))
error ("generic CPU can be used only for %stune=%s %s",
prefix, suffix, sw);
