On Thu, Oct 15, 2015 at 1:45 PM, Uros Bizjak <ubiz...@gmail.com> wrote:
> On Wed, Oct 14, 2015 at 5:08 PM, Yulia Koval <vaalfr...@gmail.com> wrote:
>> Hi,
>>
>> This patch fixes the issue:
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67963
>>
>> gcc/config/i386/i386.c (ix86_option_override_internal) Disable
>> 80387 mask if lakemont target is set.
>>
>> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
>> index 4c25c9e..db722aa 100644
>> --- a/gcc/config/i386/i386.c
>> +++ b/gcc/config/i386/i386.c
>> @@ -4943,6 +4943,12 @@ ix86_option_override_internal (bool main_args_p,
>> break;
>> }
>>
>> + if (!strcmp (opts->x_ix86_arch_string, "lakemont"))
>> + {
>> + opts->x_target_flags &= ~MASK_80387;
>> + opts_set->x_target_flags |= MASK_80387;
>> + }
>> +
>> if (TARGET_X32 && (opts->x_ix86_isa_flags & OPTION_MASK_ISA_MPX))
>> error ("Intel MPX does not support x32");
>>
>> Ok for trunk?
>
> The problem is in TARGET_SUBTARGET{32,64}_DEFAULT, that will override
> set target flags, unless relevant bit of opts_set->x_target_flags is
> set. However, we can't just set x_target_flag, because
> __attribute__((target("arch=...."))) won't work. Unfortunately, my
> proposed patch in the PR violates this last requirement.
>
> This can probably be solved by adding local "x_target_flags_mask" and
> use it after TARGET_SUBTARGET processing.
Attached is a final patch I plan to commit to mainline soon.
2015-10-15 Uros Bizjak <ubiz...@gmail.com>
PR target/67963
* config/i386/i386.c (ix86_option_override_internal): Add PTA_NO_80387.
Add PTA_NO_80387 to "lakemont". Disable MASK_80387 target flag
after target flags were initialized to target defaults.
testsuite/ChangeLog:
2015-10-15 Uros Bizjak <ubiz...@gmail.com>
PR target/67963
* gcc.target/i386/pr67963-1.c: New test.
* gcc.target/i386/pr67963-2.c: Ditto.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Uros.
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c (revision 228843)
+++ config/i386/i386.c (working copy)
@@ -4247,6 +4247,7 @@ ix86_option_override_internal (bool main_args_p,
{
int i;
unsigned int ix86_arch_mask;
+ int ix86_target_flags_mask = 0;
const bool ix86_tune_specified = (opts->x_ix86_tune_string != NULL);
const char *prefix;
const char *suffix;
@@ -4311,6 +4312,7 @@ ix86_option_override_internal (bool main_args_p,
#define PTA_PCOMMIT (HOST_WIDE_INT_1 << 56)
#define PTA_MWAITX (HOST_WIDE_INT_1 << 57)
#define PTA_CLZERO (HOST_WIDE_INT_1 << 58)
+#define PTA_NO_80387 (HOST_WIDE_INT_1 << 59)
#define PTA_CORE2 \
(PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 \
@@ -4355,7 +4357,7 @@ ix86_option_override_internal (bool main_args_p,
{"i486", PROCESSOR_I486, CPU_NONE, 0},
{"i586", PROCESSOR_PENTIUM, CPU_PENTIUM, 0},
{"pentium", PROCESSOR_PENTIUM, CPU_PENTIUM, 0},
- {"lakemont", PROCESSOR_LAKEMONT, CPU_PENTIUM, 0},
+ {"lakemont", PROCESSOR_LAKEMONT, CPU_PENTIUM, PTA_NO_80387},
{"pentium-mmx", PROCESSOR_PENTIUM, CPU_PENTIUM, PTA_MMX},
{"winchip-c6", PROCESSOR_I486, CPU_NONE, PTA_MMX},
{"winchip2", PROCESSOR_I486, CPU_NONE, PTA_MMX | PTA_3DNOW | PTA_PRFCHW},
@@ -4935,7 +4937,9 @@ ix86_option_override_internal (bool main_args_p,
if (processor_alias_table[i].flags & PTA_MWAITX
&& !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_MWAITX))
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MWAITX;
-
+ if (processor_alias_table[i].flags & PTA_NO_80387
+ && !(opts_set->x_target_flags & MASK_80387))
+ ix86_target_flags_mask |= MASK_80387;
break;
}
@@ -5126,6 +5130,9 @@ ix86_option_override_internal (bool main_args_p,
opts->x_target_flags |= MASK_NO_RED_ZONE;
}
+ /* Disable specific processor dependant features after target defaults. */
+ opts->x_target_flags &= ~ix86_target_flags_mask;
+
/* Keep nonleaf frame pointers. */
if (opts->x_flag_omit_frame_pointer)
opts->x_target_flags &= ~MASK_OMIT_LEAF_FRAME_POINTER;
Index: testsuite/gcc.target/i386/pr67963-1.c
===================================================================
--- testsuite/gcc.target/i386/pr67963-1.c (revision 0)
+++ testsuite/gcc.target/i386/pr67963-1.c (working copy)
@@ -0,0 +1,9 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2 -march=lakemont" } */
+
+float foo (void)
+{
+ return 0.0f;
+}
+
+/* { dg-final { scan-assembler-not "fldz" } } */
Index: testsuite/gcc.target/i386/pr67963-2.c
===================================================================
--- testsuite/gcc.target/i386/pr67963-2.c (revision 0)
+++ testsuite/gcc.target/i386/pr67963-2.c (working copy)
@@ -0,0 +1,11 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2 -march=pentium" } */
+
+float
+__attribute__((target("arch=lakemont")))
+foo (void)
+{
+ return 0.0f;
+}
+
+/* { dg-final { scan-assembler-not "fldz" } } */
