On Fri, Jul 17, 2015 at 12:10 AM, Uros Bizjak <ubiz...@gmail.com> wrote:
> If the target only has integer registers, we don't have to go through
> delicately tuned alternatives, balanced between x87 regs, SSE regs and
> integer regs. Attached patch introduces simple and effective
> alternatives in this case.
>
> Testcases will be provided later by HJ.
>
> 2015-07-17 Uros Bizjak <ubiz...@gmail.com>
>
> PR target/66824
> * config/i386/i386.h (TARGET_HARD_SF_REGS): New define.
> (TARGET_HARD_DF_REGS): Ditto.
> (TARGET_HARD_XF_REGS): Ditto.
> * config/i386/i386.md (*movxf_internal): Add alternatives 9 and 10.
> Enable alternatives 9 and 10 only for !TARGET_HARD_XF_REG target.
> (*movdf_internal): Add alternatives 22, 23, 24 and 25. Enable
> alternatives 22, 23, 24 and 25 only for !TARGET_HARD_DF_REG target.
> (*movsf_internal): Add alternatives 16 and 17. Enable
> alternatives 16 and 17 only for !TARGET_HARD_SF_REG target.
>
> Bootstrapped and regression tested on x86_64-linux-gnu {,-m32} and
> committed to mainline.
>
I checked in this testcase.
Thanks.
--
H.J.
---
Index: ChangeLog
===================================================================
--- ChangeLog (revision 225928)
+++ ChangeLog (working copy)
@@ -1,3 +1,8 @@
+2015-07-17 H.J. Lu <hongjiu...@intel.com>
+
+ PR target/66824
+ * gcc.target/i386/pr66824.c:
+
2015-07-17 Andre Vehreschild <ve...@gcc.gnu.org>
PR fortran/66035
Index: gcc.target/i386/pr66824.c
===================================================================
--- gcc.target/i386/pr66824.c (revision 0)
+++ gcc.target/i386/pr66824.c (working copy)
@@ -0,0 +1,29 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2 -mno-sse -mno-mmx -mno-80387" } */
+/* { dg-final { scan-assembler-not "\.LC\[0-9\]" } } */
+
+double foo (float);
+
+double
+f1 (void)
+{
+ return foo (1.0);
+}
+
+double
+f2 (void)
+{
+ return foo (0.0);
+}
+
+void
+f3 (float *x, float t)
+{
+ *x = 0.0 + t;
+}
+
+float
+f4 (void)
+{
+ return 1.0;
+}
