One problem with the automatically-generated gen_rtx_FOO () macros is that they always have a mode parameter, even for codes like SET where the mode should always be VOIDmode. This inevitably leads to cases where a caller accidentally passes something other than VOIDmode. E.g. when expanding an SImode move, the temptation is to make everything SImode, even the SETs. This in turn can cause two instructions to appear different simply because their SETs have different modes, even though the SET_DEST and SET_SRC are identical.
E.g. for gcc/testsuite/g++.dg/torture/pr34651.C on lm32-elf we have
the following before jump2:
(jump_insn 42 191 43 5 (set (pc)
(if_then_else (eq:SI (reg:SI 13 r13 [orig:43 inHotKey$4+-3 ] [43])
(const_int 0 [0]))
(label_ref 53)
(pc))) gcc/testsuite/g++.dg/torture/pr34651.C:22 22 {*beq}
(expr_list:REG_DEAD (reg:SI 13 r13 [orig:43 inHotKey$4+-3 ] [43])
(int_list:REG_BR_PROB 5000 (nil)))
-> 53)
(note 43 42 48 6 [bb 6] NOTE_INSN_BASIC_BLOCK)
(insn 48 43 47 6 (set (reg:SI 2 r2)
(mem/u/c:SI (reg:SI 1 r1) [4 S4 A32]))
gcc/testsuite/g++.dg/torture/pr34651.C:22 7 {movsi_insn}
(expr_list:REG_DEAD (reg:SI 1 r1)
(nil)))
[...]
(code_label 53 169 54 7 6 "" [1 uses])
(note 54 53 12 7 [bb 7] NOTE_INSN_BASIC_BLOCK)
(insn 12 54 57 7 (set:SI (reg/f:SI 2 r2 [orig:46 D.2050 ] [46])
(mem/u/c:SI (reg:SI 1 r1) [4 S4 A32]))
gcc/testsuite/g++.dg/torture/pr34651.C:22 7 {movsi_insn}
(expr_list:REG_DEAD (reg:SI 1 r1)
(expr_list:REG_EQUAL (symbol_ref/f:SI ("*.LC3") [flags 0x2]
<var_decl # *.LC3>)
(nil))))
where insns 12 and 48 are identical except for the :SI on the SET.
This difference prevents us from merging the heads of the two blocks;
after removing it we replace the two loads with a single load before
the branch.
This patch removes the mode argument from gen_rtx_SET and updates
all callers. I used a script to (try to) make sure that all callers
really had been caught. I also built one target per CPU just in case.
There were some changes in gcc.dg, g++.dg and gcc.c-torture assembly
code for c6x-elf, lm32-elf and v850-elf, but all of them seemed to be
code improvements from removing duplicated instructions. (Other ports
also passed spurious modes but apparently not in a way that affects
the tests I'd tried.) Also tested on x86_64-linux-gnu. OK to install?
BTW, I've split the patch up into two, the last bit being a mechanical
removal of modes. (I did it by hand though to try to keep things
properly formatted.)
Thanks,
Richard
gcc/
* rtl.h (always_void_p): New function.
* gengenrtl.c (always_void_p(: Likewise.
(genmacro): Don't add a mode parameter to gen_rtx_foo if rtxes
with code foo are always VOIDmode.
* genemit.c (gen_exp): Update gen_rtx_foo calls accordingly.
* builtins.c, caller-save.c, calls.c, cfgexpand.c, combine.c,
compare-elim.c, config/aarch64/aarch64.c,
config/aarch64/aarch64.md, config/alpha/alpha.c,
config/alpha/alpha.md, config/arc/arc.c, config/arc/arc.md,
config/arm/arm-fixed.md, config/arm/arm.c, config/arm/arm.md,
config/arm/ldrdstrd.md, config/arm/thumb2.md, config/arm/vfp.md,
config/avr/avr.c, config/bfin/bfin.c, config/c6x/c6x.c,
config/c6x/c6x.md, config/cr16/cr16.c, config/cris/cris.c,
config/cris/cris.md, config/darwin.c, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c, config/frv/frv.c,
config/frv/frv.md, config/h8300/h8300.c, config/i386/i386.c,
config/i386/i386.md, config/i386/sse.md, config/ia64/ia64.c,
config/ia64/vect.md, config/iq2000/iq2000.c,
config/iq2000/iq2000.md, config/lm32/lm32.c, config/lm32/lm32.md,
config/m32c/m32c.c, config/m32r/m32r.c, config/m68k/m68k.c,
config/m68k/m68k.md, config/mcore/mcore.c, config/mcore/mcore.md,
config/mep/mep.c, config/microblaze/microblaze.c,
config/mips/mips.c, config/mips/mips.md, config/mmix/mmix.c,
config/mn10300/mn10300.c, config/msp430/msp430.c,
config/nds32/nds32-memory-manipulation.c, config/nds32/nds32.c,
config/nds32/nds32.md, config/nios2/nios2.c, config/nvptx/nvptx.c,
config/pa/pa.c, config/pa/pa.md, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000.c,
config/rs6000/rs6000.md, config/rs6000/vector.md,
config/rs6000/vsx.md, config/rx/rx.c, config/rx/rx.md,
config/s390/s390.c, config/s390/s390.md, config/sh/sh.c,
config/sh/sh.md, config/sh/sh_treg_combine.cc,
config/sparc/sparc.c, config/sparc/sparc.md, config/spu/spu.c,
config/spu/spu.md, config/stormy16/stormy16.c,
config/tilegx/tilegx.c, config/tilegx/tilegx.md,
config/tilepro/tilepro.c, config/tilepro/tilepro.md,
config/v850/v850.c, config/v850/v850.md, config/vax/vax.c,
config/visium/visium.c, config/xtensa/xtensa.c, cprop.c, dse.c,
expr.c, gcse.c, ifcvt.c, ira.c, jump.c, lower-subreg.c,
lra-constraints.c, lra-eliminations.c, lra.c, postreload.c, ree.c,
reg-stack.c, reload.c, reload1.c, reorg.c, sel-sched.c,
var-tracking.c: Update gen_rtx_SET calls accordingly.
mechanical-part.diff.bz2
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