Hi,
A bug was exposed by LRA for loongson-shift-count-truncated-1.c and
loongson-simd.c with -O0 optimization. These testcases were ICEing
with 'Max. number of generated reloads insns per insn is achieved (90)'
error.
The problem appears to be with vector modes where contents of memory
is meant to be copied into GPRs but LRA chose to put them into accumulators
first and started inserting reloads to move the values into GPRs.
In both cases, IRA assigned the alternative GR_AND_MD0_REGS class to
allocnos. Since accumulators appear first in REG_ALLOC_ORDER macro,
LRA picks LO/HI registers even if it's more costly than GPRs and wants
to insert reloads to move in/out values to/from accumulators for which
we don't have patterns i.e. to handle (set (reg:V2SI ) (mem:V2SI ...)).
The fix is to prohibit the use of accumulator registers for vector modes.
Unfortunately, I have no testcase exposing this on the trunk but it seems
reasonable to prohibit vectors in accumulators anyway.
I'm not sure if this patch would go to the trunk now and be queued for
Stage 1.
Regards,
Robert
2015-01-23 Robert Suchanek <robert.sucha...@imgtec.com>
* config/mips/mips.c (mips_hard_regno_mode_ok_p): Prohibit accumulators
for all vector modes.
---
gcc/config/mips/mips.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 443a712..1733457 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -12131,7 +12131,9 @@ mips_hard_regno_mode_ok_p (unsigned int regno,
machine_mode mode)
return size >= MIN_UNITS_PER_WORD && size <= UNITS_PER_FPREG;
}
+ /* Don't allow vector modes in accumulators. */
if (ACC_REG_P (regno)
+ && !VECTOR_MODE_P (mode)
&& (INTEGRAL_MODE_P (mode) || ALL_FIXED_POINT_MODE_P (mode)))
{
if (MD_REG_P (regno))
--
2.2.2
