Richard Henderson <r...@redhat.com> writes:
> On 06/01/2011 07:51 AM, Rainer Orth wrote:
>> + /* Set PC to the instruction after the faulting one to skip over it,
>> + otherwise we enter an infinite loop. 4 is the size of the stmxcsr
>> + instruction. */
> ...
>> + /* We need a single SSE instruction here so the handler can safely
>> skip
>> + over it. */
>> + __asm__ volatile ("movss %xmm2,%xmm1");
>
> The comment referencing stmxcsr doesn't match the movss code.
> It's still a 4 byte opcode, so the code still works.
>
> I do wonder if using "movaps %xmm0,%xmm0" might be cleaner,
> to avoid clobbering a register, even if that register is
> surely dead anyway. That's a 3 byte opcode though, so the
> handler would need updating.
Here's what I installed after regtesting completed on
i386-pc-solaris2.{8, 11}.
Thanks.
Rainer
2011-06-02 Richard Henderson <r...@redhat.com>
Rainer Orth <r...@cebitec.uni-bielefeld.de>
gcc:
* config/i386/crtfastmath.c [!__x86_64__ && __sun__ && __svr4__]
(sigill_hdlr): Correct insn, insn size.
(set_fast_math) [!__x86_64__ && __sun__ && __svr4__]: Use movaps.
gcc/testsuite:
* lib/target-supports.exp (check_sse_os_support_available): Use
movaps.
libgfortran.
* config/fpu-387.h [__sun__ && __svr4__] (sigill_hdlr): Correct
insn, insn size.
(has_sse) [!__x86_64__ && __sun__ && __svr4__]: Use movaps.
diff --git a/gcc/config/i386/crtfastmath.c b/gcc/config/i386/crtfastmath.c
--- a/gcc/config/i386/crtfastmath.c
+++ b/gcc/config/i386/crtfastmath.c
@@ -30,7 +30,7 @@
#include "cpuid.h"
#endif
-#if !defined __x86_64 && defined __sun__ && defined __svr4__
+#if !defined __x86_64__ && defined __sun__ && defined __svr4__
#include <signal.h>
#include <ucontext.h>
@@ -43,9 +43,9 @@ sigill_hdlr (int sig __attribute((unused
{
sigill_caught = 1;
/* Set PC to the instruction after the faulting one to skip over it,
- otherwise we enter an infinite loop. 4 is the size of the stmxcsr
+ otherwise we enter an infinite loop. 3 is the size of the movaps
instruction. */
- ucp->uc_mcontext.gregs[EIP] += 4;
+ ucp->uc_mcontext.gregs[EIP] += 3;
setcontext (ucp);
}
#endif
@@ -83,7 +83,7 @@ set_fast_math (void)
/* We need a single SSE instruction here so the handler can safely skip
over it. */
- __asm__ volatile ("movss %xmm2,%xmm1");
+ __asm__ volatile ("movaps %xmm0,%xmm0");
sigaction (SIGILL, &oact, NULL);
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1059,7 +1059,7 @@ proc check_sse_os_support_available { }
check_runtime_nocache sse_os_support_available {
int main ()
{
- __asm__ volatile ("movss %xmm2,%xmm1");
+ __asm__ volatile ("movaps %xmm0,%xmm0");
return 0;
}
} "-msse"
diff --git a/libgfortran/config/fpu-387.h b/libgfortran/config/fpu-387.h
--- a/libgfortran/config/fpu-387.h
+++ b/libgfortran/config/fpu-387.h
@@ -1,5 +1,5 @@
/* FPU-related code for x86 and x86_64 processors.
- Copyright 2005, 2007, 2009, 2010 Free Software Foundation, Inc.
+ Copyright 2005, 2007, 2009, 2010, 2011 Free Software Foundation, Inc.
Contributed by Francois-Xavier Coudert <coud...@clipper.ens.fr>
This file is part of the GNU Fortran 95 runtime library (libgfortran).
@@ -40,9 +40,9 @@ sigill_hdlr (int sig __attribute((unused
{
sigill_caught = 1;
/* Set PC to the instruction after the faulting one to skip over it,
- otherwise we enter an infinite loop. 4 is the size of the stmxcsr
+ otherwise we enter an infinite loop. 3 is the size of the movaps
instruction. */
- ucp->uc_mcontext.gregs[EIP] += 4;
+ ucp->uc_mcontext.gregs[EIP] += 3;
setcontext (ucp);
}
#endif
@@ -73,7 +73,7 @@ has_sse (void)
/* We need a single SSE instruction here so the handler can safely skip
over it. */
- __asm__ volatile ("movss %xmm2,%xmm1");
+ __asm__ volatile ("movaps %xmm0,%xmm0");
sigaction (SIGILL, &oact, NULL);
--
-----------------------------------------------------------------------------
Rainer Orth, Center for Biotechnology, Bielefeld University
