Richard Henderson <[email protected]> writes:
> On 06/01/2011 07:51 AM, Rainer Orth wrote:
>> + /* Set PC to the instruction after the faulting one to skip over it,
>> + otherwise we enter an infinite loop. 4 is the size of the stmxcsr
>> + instruction. */
> ...
>> + /* We need a single SSE instruction here so the handler can safely
>> skip
>> + over it. */
>> + __asm__ volatile ("movss %xmm2,%xmm1");
>
> The comment referencing stmxcsr doesn't match the movss code.
> It's still a 4 byte opcode, so the code still works.
Copy-and-paste error ;-( We already have the same code in
libgfortran/config/fpu-387.h and (without the comment) in
gcc/testsuite/lib/target-supports.exp. I still mean to fix
driver-i386.c to correcly handle -march=native on Solaris 8 and 9 which
cannot in general execute SSE insns. I wonder if there's a better place
to share this code?
> I do wonder if using "movaps %xmm0,%xmm0" might be cleaner,
> to avoid clobbering a register, even if that register is
> surely dead anyway. That's a 3 byte opcode though, so the
> handler would need updating.
I'll give it a try.
Thanks.
Rainer
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Rainer Orth, Center for Biotechnology, Bielefeld University
