On Wed, May 25, 2011 at 12:11 PM, Uros Bizjak <ubiz...@gmail.com> wrote:
> On Wed, May 25, 2011 at 6:20 PM, H.J. Lu <hjl.to...@gmail.com> wrote:
>
>>>>>> We are working on a new optimization, which turns off TARGET_MOVX.
>>>>>> GCC generates:
>>>>>>
>>>>>> movb %ah, %dil
>>>>>>
>>>>>> But %ah can only be used with %[abcd][hl]. This patch adds QIreg_operand
>>>>>> and uses it in *movqi_extv_1_rex64/*movqi_extzv_2_rex64. OK for trunk
>>>>>> if there is no regression? and Replace
>>> q_regs_operand with QIreg_operand.
>>> (
>>>>>
>>>>> If this is the case, then please change "q_regs_operand" predicate to
>>>>> accept just QI_REG_P registers.
>>>>>
>>>>
>>>> I thought about it. It is a problem only with %[abcd]h. I am not sure if
>>>> changing q_regs_operand to accept just QI_REG_P registers will negatively
>>>> impact
>>>
>>> I see. The patch is OK then, but for consistency, please change the
>>> predicate of *movqi_extv_1*movqi_extzv_2 as well. Oh, and the
>>> "register_operand" check in "type" calculation can be removed.
>>>
>>> Thanks,
>>> Uros.
>>>
>>
>> This is what I checked in.
>>
>> Thanks.
>>
>> --
>> H.J.
>> ---
>> 2011-05-25 H.J. Lu <hongjiu...@intel.com>
>>
>> PR target/49142
>> * config/i386/i386.md (*movqi_extv_1_rex64): Remove
>> "register_operand" check and replace q_regs_operand with
>> QIreg_operand in "type" calculation.
>> (*movqi_extv_1): Likewise.
>> (*movqi_extzv_2_rex64): Likewise.
>> (*movqi_extzv_2): Likewise.
>
> Er, I didn't mean to remove register_operand check from 32bit
> patterns... there, operand 0 can also be memory operand due to
> "nonimmediate_operand" constraint.
Ooops. I am checking in this.
Thanks.
--
H.J.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ed1834f..1afef8e 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,11 @@
2011-05-25 H.J. Lu <hongjiu...@intel.com>
+ * config/i386/i386.md (*movqi_extv_1)): Put back
+ "register_operand" check in "type" calculation.
+ (*movqi_extzv_2): Likewise.
+
+2011-05-25 H.J. Lu <hongjiu...@intel.com>
+
* doc/extend.texi (X86 Built-in Functions): Update pause
intrinsic.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 1cdbe7e..13a1cde 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2514,9 +2514,10 @@
}
}
[(set (attr "type")
- (if_then_else (ior (not (match_operand:QI 0 "QIreg_operand" ""))
- (ne (symbol_ref "TARGET_MOVX")
- (const_int 0)))
+ (if_then_else (and (match_operand:QI 0 "register_operand" "")
+ (ior (not (match_operand:QI 0 "QIreg_operand" ""))
+ (ne (symbol_ref "TARGET_MOVX")
+ (const_int 0))))
(const_string "imovx")
(const_string "imov")))
(set (attr "mode")
@@ -2578,9 +2579,10 @@
}
}
[(set (attr "type")
- (if_then_else (ior (not (match_operand:QI 0 "QIreg_operand" ""))
- (ne (symbol_ref "TARGET_MOVX")
- (const_int 0)))
+ (if_then_else (and (match_operand:QI 0 "register_operand" "")
+ (ior (not (match_operand:QI 0 "QIreg_operand" ""))
+ (ne (symbol_ref "TARGET_MOVX")
+ (const_int 0))))
(const_string "imovx")
(const_string "imov")))
(set (attr "mode")
