https://gcc.gnu.org/g:f63ce80b227659355651b3d39362081ee18ba09e

commit f63ce80b227659355651b3d39362081ee18ba09e
Author: GCC Administrator <gccad...@gcc.gnu.org>
Date:   Mon Jul 21 00:16:28 2025 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           |  5 +++++
 gcc/DATESTAMP           |  2 +-
 gcc/testsuite/ChangeLog | 24 ++++++++++++++++++++++++
 libstdc++-v3/ChangeLog  |  6 ++++++
 4 files changed, 36 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 12b0d90c48aa..09da8627c035 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2025-07-20  Pan Li  <pan2...@intel.com>
+
+       * config/riscv/autovec.md: Add (const_int 1) as the op2 of
+       ashiftrt.
+
 2025-07-19  Dimitar Dimitrov  <dimi...@dinux.eu>
 
        PR target/121124
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index eafd44957d21..b1af684c2905 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250720
+20250721
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index affea6525191..1c313e05ca07 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,27 @@
+2025-07-20  Andrew Pinski  <quic_apin...@quicinc.com>
+
+       PR testsuite/120859
+       * gcc.dg/tree-prof/afdo-crossmodule-1b.c: Add some dg-*
+       commands like what is in afdo-crossmodule-1.c
+
+2025-07-20  Pan Li  <pan2...@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c:
+       Leverage DEF_AVG_0_WRAP to generate the correct func name.
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i64-from-i128.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i32-from-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i64-from-i128.c: Ditto.
+
 2025-07-19  Dimitar Dimitrov  <dimi...@dinux.eu>
 
        PR target/121124
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index b60a96f9bc38..f297f6044da6 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,9 @@
+2025-07-20  Jakub Jelinek  <ja...@redhat.com>
+
+       PR libstdc++/121174
+       * src/c++23/std.cc.in (std::dextents): Export.  Add to FIXME comments
+       other not yet implemented nor exported <mdspan> entities.
+
 2025-07-18  Jonathan Wakely  <jwak...@redhat.com>
 
        * include/bits/stl_iterator_base_types.h (__any_input_iterator):

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