https://gcc.gnu.org/g:f4ebc9b7b1a1f3270eafe649c559dedc94e0553d
commit r16-1518-gf4ebc9b7b1a1f3270eafe649c559dedc94e0553d
Author: Takayuki 'January June' Suwa <jjsuwa_sys3...@yahoo.co.jp>
Date: Sat Jun 14 20:30:55 2025 +0900
xtensa: Revert "xtensa: Eliminate unnecessary general-purpose reg-reg moves"
Due to improved register allocation for GP registers whose modes has been
changed by paradoxical SUBREGs, the previously committed patch
"xtensa: eliminate unnecessary general-purpose reg-reg moves"
(commit f83e76c3f998c8708fe2ddca16ae3f317c39c37a) is no longer necessary
and is therefore reverted.
gcc/ChangeLog:
* config/xtensa/xtensa.md:
Remove the peephole2 pattern that was previously added.
gcc/testsuite/ChangeLog:
* gcc.target/xtensa/elim_GP_regmove_0.c: Remove.
* gcc.target/xtensa/elim_GP_regmove_1.c: Remove.
Diff:
---
gcc/config/xtensa/xtensa.md | 46 ----------------------
.../gcc.target/xtensa/elim_GP_regmove_0.c | 23 -----------
.../gcc.target/xtensa/elim_GP_regmove_1.c | 10 -----
3 files changed, 79 deletions(-)
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 56e222dddfd2..3064a44f9b55 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -3460,49 +3460,3 @@ FALLTHRU:;
operands[1] = GEN_INT (imm0);
operands[2] = GEN_INT (imm1);
})
-
-(define_peephole2
- [(set (match_operand 0 "register_operand")
- (match_operand 1 "register_operand"))]
- "REG_NREGS (operands[0]) == 1 && GP_REG_P (REGNO (operands[0]))
- && REG_NREGS (operands[1]) == 1 && GP_REG_P (REGNO (operands[1]))
- && peep2_reg_dead_p (1, operands[1])"
- [(const_int 0)]
-{
- basic_block bb = BLOCK_FOR_INSN (curr_insn);
- rtx_insn *head = BB_HEAD (bb), *insn;
- rtx dest = operands[0], src = operands[1], pattern, t_dest, dest_orig;
- for (insn = PREV_INSN (curr_insn);
- insn && insn != head;
- insn = PREV_INSN (insn))
- if (CALL_P (insn))
- break;
- else if (INSN_P (insn))
- {
- if (GET_CODE (pattern = PATTERN (insn)) == SET
- && REG_P (t_dest = SET_DEST (pattern))
- && REG_NREGS (t_dest) == 1
- && REGNO (t_dest) == REGNO (src))
- {
- dest_orig = SET_DEST (pattern);
- SET_DEST (pattern) = gen_rtx_REG (GET_MODE (t_dest),
- REGNO (dest));
- extract_insn (insn);
- if (!constrain_operands (true, get_enabled_alternatives (insn)))
- {
- SET_DEST (pattern) = dest_orig;
- goto ABORT;
- }
- df_insn_rescan (insn);
- goto FALLTHRU;
- }
- if (reg_overlap_mentioned_p (dest, pattern)
- || reg_overlap_mentioned_p (src, pattern)
- || set_of (dest, insn)
- || set_of (src, insn))
- break;
- }
-ABORT:
- FAIL;
-FALLTHRU:;
-})
diff --git a/gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_0.c
b/gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_0.c
deleted file mode 100644
index 5c195c357dc6..000000000000
--- a/gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_0.c
+++ /dev/null
@@ -1,23 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-O2 -fpeephole2" } */
-
-/* can be processed */
-double test0(double a, double b) {
- return __builtin_copysign(a, b);
-}
-
-/* cannot be processed: due to violate '0' constraint of the 2nd source
operand. */
-int test1(int a, int b) {
- int c;
- asm volatile ("" : "=a"(c) : "r"(a), "0"(b));
- return c;
-}
-
-/* cannot be processed: due to violate '&' constraint of the destination
operand. */
-int test2(int a) {
- int b;
- asm volatile ("" : "=&a"(b) : "r"(a));
- return b;
-}
-
-/* { dg-final { scan-assembler-times "mov\t|mov.n\t" 2 } } */
diff --git a/gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_1.c
b/gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_1.c
deleted file mode 100644
index a13ef818827e..000000000000
--- a/gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_1.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-O2 -fpeephole2 -mabi=windowed" } */
-
-/* cannot be processed: due to violate 'a' constraint of the destination
operand of the stack adjustment instruction. */
-void test(void) {
- int buffer[8192];
- asm volatile ("" : : "m"(buffer));
-}
-
-/* { dg-final { scan-assembler-times "movsp" 1 } } */
