https://gcc.gnu.org/g:e6f89d78c1a7528e93458278e35d365544a18c26
commit r16-160-ge6f89d78c1a7528e93458278e35d365544a18c26
Author: Andrew Pinski <quic_apin...@quicinc.com>
Date: Wed Feb 5 14:44:25 2025 -0800
simplify-rtx: Simplify `(zero_extend (and x CST))` -> (and (subreg x) CST)
This adds the simplification of a ZERO_EXTEND of an AND. This optimization
was already handled in combine via combine_simplify_rtx and the handling
there of compound_operations (ZERO_EXTRACT).
Build and tested for aarch64-linux-gnu.
Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* simplify-rtx.cc (simplify_context::simplify_unary_operation_1)
<case ZERO_EXTEND>:
Add simplifcation for and with a constant.
Signed-off-by: Andrew Pinski <quic_apin...@quicinc.com>
Diff:
---
gcc/simplify-rtx.cc | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index 88d31a71c05a..06b52ca80037 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -1709,6 +1709,17 @@ simplify_context::simplify_unary_operation_1 (rtx_code
code, machine_mode mode,
if (GET_MODE (op) == mode)
return op;
+ /* (zero_extend:SI (and:QI X (const))) -> (and:SI (lowpart:SI X) const)
+ where const does not sign bit set. */
+ if (GET_CODE (op) == AND
+ && CONST_INT_P (XEXP (op, 1))
+ && INTVAL (XEXP (op, 1)) > 0)
+ {
+ rtx tem = rtl_hooks.gen_lowpart_no_emit (mode, XEXP (op, 0));
+ if (tem)
+ return simplify_gen_binary (AND, mode, tem, XEXP (op, 1));
+ }
+
/* Check for a zero extension of a subreg of a promoted
variable, where the promotion is zero-extended, and the
target mode is the same as the variable's promotion. */
