https://gcc.gnu.org/g:e82daf33cc6ea197a920e987d10dac4ca5f39657
commit e82daf33cc6ea197a920e987d10dac4ca5f39657
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Tue Apr 15 17:21:43 2025 -0400
Revert changes
Diff:
---
gcc/config/rs6000/rs6000-c.cc | 29 +++++++++++++----------------
gcc/config/rs6000/rs6000-cpus.def | 10 +++++++++-
gcc/config/rs6000/rs6000-protos.h | 5 ++---
gcc/config/rs6000/rs6000.cc | 20 +++++++++-----------
gcc/config/rs6000/rs6000.h | 19 ++++++-------------
gcc/config/rs6000/rs6000.opt | 17 +++++++++++++++--
6 files changed, 54 insertions(+), 46 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 6d6838735b33..6757a2477ad1 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -338,8 +338,7 @@ rs6000_define_or_undefine_macro (bool define_p, const char
*name)
#pragma GCC target, we need to adjust the macros dynamically. */
void
-rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags,
- HOST_WIDE_INT arch_flags)
+rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
{
if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET)
fprintf (stderr,
@@ -412,7 +411,7 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT
flags,
summary of the flags associated with particular cpu
definitions. */
- /* rs6000_isa_flags and rs6000_arch_flags based options. */
+ /* rs6000_isa_flags based options. */
rs6000_define_or_undefine_macro (define_p, "_ARCH_PPC");
if ((flags & OPTION_MASK_PPC_GPOPT) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PPCSQ");
@@ -420,27 +419,25 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT
flags,
rs6000_define_or_undefine_macro (define_p, "_ARCH_PPCGR");
if ((flags & OPTION_MASK_POWERPC64) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PPC64");
- if ((flags & OPTION_MASK_POWERPC64) != 0)
- rs6000_define_or_undefine_macro (define_p, "_ARCH_PPC64");
- if ((arch_flags & ARCH_MASK_POWER4) != 0)
+ if ((flags & OPTION_MASK_MFCRF) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR4");
- if ((arch_flags & ARCH_MASK_POWER5) != 0)
+ if ((flags & OPTION_MASK_POPCNTB) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5");
- if ((arch_flags & ARCH_MASK_POWER5X) != 0)
+ if ((flags & OPTION_MASK_FPRND) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5X");
- if ((arch_flags & ARCH_MASK_POWER6) != 0)
+ if ((flags & OPTION_MASK_CMPB) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6");
- if ((arch_flags & ARCH_MASK_POWER7) != 0)
+ if ((flags & OPTION_MASK_POPCNTD) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
- if ((arch_flags & ARCH_MASK_POWER8) != 0)
+ if ((flags & OPTION_MASK_POWER8) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8");
- if ((arch_flags & ARCH_MASK_POWER9) != 0)
+ if ((flags & OPTION_MASK_MODULO) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
- if ((arch_flags & ARCH_MASK_POWER10) != 0)
+ if ((flags & OPTION_MASK_POWER10) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
- if ((arch_flags & ARCH_MASK_POWER11) != 0)
+ if ((flags & OPTION_MASK_POWER11) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
- if ((arch_flags & ARCH_MASK_FUTURE) != 0)
+ if ((flags & OPTION_MASK_FUTURE) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE");
if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
@@ -610,7 +607,7 @@ void
rs6000_cpu_cpp_builtins (cpp_reader *pfile)
{
/* Define all of the common macros. */
- rs6000_target_modify_macros (true, rs6000_isa_flags, rs6000_arch_flags);
+ rs6000_target_modify_macros (true, rs6000_isa_flags);
if (TARGET_FRE)
builtin_define ("__RECIP__");
diff --git a/gcc/config/rs6000/rs6000-cpus.def
b/gcc/config/rs6000/rs6000-cpus.def
index 23ca24b71b34..063591f5c094 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -47,6 +47,7 @@
fusion here, instead set it in rs6000.cc if we are tuning for a power8
system. */
#define ISA_2_7_MASKS_SERVER (ISA_2_6_MASKS_SERVER \
+ | OPTION_MASK_POWER8 \
| OPTION_MASK_P8_VECTOR \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_EFFICIENT_UNALIGNED_VSX \
@@ -76,11 +77,14 @@
| OPTION_MASK_PREFIXED)
#define ISA_3_1_MASKS_SERVER (ISA_3_0_MASKS_SERVER \
+ | OPTION_MASK_POWER10 \
| OTHER_POWER10_MASKS)
-#define POWER11_MASKS_SERVER ISA_3_1_MASKS_SERVER
+#define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER \
+ | OPTION_MASK_POWER11)
#define FUTURE_MASKS_SERVER (POWER11_MASKS_SERVER \
+ | OPTION_MASK_FUTURE \
| OPTION_MASK_BLOCK_OPS_VECTOR_PAIR)
/* Flags that need to be turned off if -mno-vsx. */
@@ -120,6 +124,9 @@
| OPTION_MASK_FLOAT128_HW \
| OPTION_MASK_FLOAT128_KEYWORD \
| OPTION_MASK_FPRND \
+ | OPTION_MASK_FUTURE \
+ | OPTION_MASK_POWER10 \
+ | OPTION_MASK_POWER11 \
| OPTION_MASK_P10_FUSION \
| OPTION_MASK_HTM \
| OPTION_MASK_ISEL \
@@ -128,6 +135,7 @@
| OPTION_MASK_MODULO \
| OPTION_MASK_MULHW \
| OPTION_MASK_NO_UPDATE \
+ | OPTION_MASK_POWER8 \
| OPTION_MASK_P8_FUSION \
| OPTION_MASK_P8_VECTOR \
| OPTION_MASK_P9_MINMAX \
diff --git a/gcc/config/rs6000/rs6000-protos.h
b/gcc/config/rs6000/rs6000-protos.h
index 4619142d197b..234eb0ae2b3a 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -324,9 +324,8 @@ extern void rs6000_cpu_cpp_builtins (struct cpp_reader *);
extern bool rs6000_pragma_target_parse (tree, tree);
#endif
extern void rs6000_activate_target_options (tree new_tree);
-extern void rs6000_target_modify_macros (bool, HOST_WIDE_INT, HOST_WIDE_INT);
-extern void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT,
- HOST_WIDE_INT);
+extern void rs6000_target_modify_macros (bool, HOST_WIDE_INT);
+extern void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT);
#ifdef NO_DOLLAR_IN_LABEL
const char * rs6000_xcoff_strip_dollar (const char *);
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index cc57930f026a..b355f674e1cf 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -277,7 +277,7 @@ bool cpu_builtin_p = false;
/* Pointer to function (in rs6000-c.cc) that can define or undefine target
macros that have changed. Languages that don't support the preprocessor
don't link in rs6000-c.cc, so we can't call it directly. */
-void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT, HOST_WIDE_INT);
+void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT);
/* Simplfy register classes into simpler classifications. We assume
GPR_REG_TYPE - FPR_REG_TYPE are ordered so that we can use a simple range
@@ -3911,7 +3911,8 @@ rs6000_option_override_internal (bool global_init_p)
/* If little-endian, default to -mstrict-align on older processors. */
if (!BYTES_BIG_ENDIAN
- && (get_arch_flags (tune_index) & ARCH_MASK_POWER8) == 0)
+ && !(processor_target_table[tune_index].target_enable
+ & OPTION_MASK_POWER8))
rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN;
/* Add some warnings for VSX. */
@@ -24558,6 +24559,9 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
{ "float128", OPTION_MASK_FLOAT128_KEYWORD, false,
true },
{ "float128-hardware", OPTION_MASK_FLOAT128_HW, false, true },
{ "fprnd", OPTION_MASK_FPRND, false, true },
+ { "future", OPTION_MASK_FUTURE, false, false },
+ { "power10", OPTION_MASK_POWER10, false, true },
+ { "power11", OPTION_MASK_POWER11, false, false },
{ "hard-dfp", OPTION_MASK_DFP, false,
true },
{ "htm", OPTION_MASK_HTM, false, true },
{ "isel", OPTION_MASK_ISEL, false, true },
@@ -24989,7 +24993,6 @@ rs6000_pragma_target_parse (tree args, tree pop_target)
tree cur_tree;
struct cl_target_option *prev_opt, *cur_opt;
HOST_WIDE_INT prev_flags, cur_flags, diff_flags;
- HOST_WIDE_INT prev_arch, cur_arch, diff_arch;
if (TARGET_DEBUG_TARGET)
{
@@ -25042,26 +25045,21 @@ rs6000_pragma_target_parse (tree args, tree
pop_target)
{
prev_opt = TREE_TARGET_OPTION (prev_tree);
prev_flags = prev_opt->x_rs6000_isa_flags;
- prev_arch = prev_opt->x_rs6000_arch_flags;
cur_opt = TREE_TARGET_OPTION (cur_tree);
cur_flags = cur_opt->x_rs6000_isa_flags;
- cur_arch = cur_opt->x_rs6000_arch_flags;
diff_flags = (prev_flags ^ cur_flags);
- diff_arch = (prev_arch ^ cur_arch);
- if (diff_flags != 0 || diff_arch != 0)
+ if (diff_flags != 0)
{
/* Delete old macros. */
rs6000_target_modify_macros_ptr (false,
- prev_flags & diff_flags,
- prev_arch & diff_arch);
+ prev_flags & diff_flags);
/* Define new macros. */
rs6000_target_modify_macros_ptr (true,
- cur_flags & diff_flags,
- cur_arch & diff_arch);
+ cur_flags & diff_flags);
}
}
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 9267612fbc9c..ce56163774eb 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -500,19 +500,12 @@ extern int rs6000_vector_align[];
#define TARGET_MINMAX (TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT \
&& (TARGET_P9_MINMAX || !flag_trapping_math))
-/* In the past we represented the various power cpus (power4, power5, power6,
- etc.) via ISA bits that highlighted a new instruction or we used an extra
- option to represent the hardware (i.e. -mpower8-internal or -mpower10). Now
- we use architecture flags for this. */
-#define TARGET_POWER5 ((rs6000_arch_flags & ARCH_MASK_POWER5) != 0)
-#define TARGET_POWER5X ((rs6000_arch_flags & ARCH_MASK_POWER5X) != 0)
-#define TARGET_POWER6 ((rs6000_arch_flags & ARCH_MASK_POWER6) != 0)
-#define TARGET_POWER7 ((rs6000_arch_flags & ARCH_MASK_POWER7) != 0)
-#define TARGET_POWER8 ((rs6000_arch_flags & ARCH_MASK_POWER8) != 0)
-#define TARGET_POWER9 ((rs6000_arch_flags & ARCH_MASK_POWER9) != 0)
-#define TARGET_POWER10 ((rs6000_arch_flags & ARCH_MASK_POWER10) != 0)
-#define TARGET_POWER11 ((rs6000_arch_flags & ARCH_MASK_POWER11) != 0)
-#define TARGET_FUTURE ((rs6000_arch_flags & ARCH_MASK_FUTURE) != 0)
+/* Convert ISA bits like POPCNTB to PowerPC processors like POWER5. */
+#define TARGET_POWER5 TARGET_POPCNTB
+#define TARGET_POWER5X TARGET_FPRND
+#define TARGET_POWER6 TARGET_CMPB
+#define TARGET_POWER7 TARGET_POPCNTD
+#define TARGET_POWER9 TARGET_MODULO
/* In switching from using target_flags to using rs6000_isa_flags, the options
machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>. The MASK_<xxxx>
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 3b782077244e..aeb360036bf1 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -482,8 +482,9 @@ Save the TOC in the prologue for indirect calls rather than
inline.
mvsx-timode
Target RejectNegative Undocumented Ignore
+;; This option exists only to create its MASK. It is not intended for users.
mpower8-internal
-Target Undocumented WarnRemoved
+Target Undocumented Mask(POWER8) Var(rs6000_isa_flags) Warn(Do not use
%<-mpower8-internal%>; use %<-mcpu=power8%> instead)
mpower8-fusion
Target Mask(P8_FUSION) Var(rs6000_isa_flags)
@@ -594,7 +595,13 @@ mspeculate-indirect-jumps
Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save
mpower10
-Target Undocumented WarnRemoved
+Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
+
+;; Users should not use -mpower11, but we need to use a bit to identify when
+;; the user changes the default cpu via #pragma GCC target("cpu=power11")
+;; and then resets it later.
+mpower11
+Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) WarnRemoved
mprefixed
Target Mask(PREFIXED) Var(rs6000_isa_flags)
@@ -635,6 +642,12 @@ mieee128-constant
Target Var(TARGET_IEEE128_CONSTANT) Init(1) Save
Generate (do not generate) code that uses the LXVKQ instruction.
+;; Users should not use -mfuture, but we need to use a bit to identify when
+;; the user changes the default cpu via #pragma GCC target("cpu=future")
+;; and then resets it later.
+mfuture
+Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) WarnRemoved
+
; Documented parameters
-param=rs6000-vect-unroll-limit=
