https://gcc.gnu.org/g:c07fafdc90d34fa3c4ae6fae6628e4e63059cb42

commit c07fafdc90d34fa3c4ae6fae6628e4e63059cb42
Author: Michael Meissner <meiss...@linux.ibm.com>
Date:   Thu Nov 14 22:03:16 2024 -0500

    Change TARGET_POPCNTB to TARGET_POWER5.
    
    This patch changes TARGET_POPCNTB to TARGET_POWER5.  The -mpopcntb switch 
is not
    being changed in this patch, just the name of the macros used to determine 
if
    the PowerPC processor supports ISA 2.2 (Power5).
    
    2024-11-14  Michael Meissner  <meiss...@linux.ibm.com>
    
    gcc/
    
            * gcc/config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported):
            Change TARGET_POPCNTB to TARGET_POWER5.
            * gcc/config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): 
Likewise.
            * gcc/config/rs6000/rs6000.h (TARGET_FCFID): Likewise.
            (TARGET_POWER5): New macro.
            (TARGET_EXTRA_BUILTINS): Change TARGET_POPCNTB to TARGET_POWER5.
            (TARGET_FRE): Likewise.
            (TARGET_FRSQRTES): Likewise.
            * gcc/config/rs6000/rs6000.md (enabled attribute): Likewise.
            (popcount<mode>2): Change TARGET_POPCNTB to TARGET_POWER5.  Delete
            redundant test for TARGET_POPCNTD.
            (popcntb<mode>): Change TARGET_POPCNTB to TARGET_POWER5.
            (popcntd<mode>): Likewise.
            (parity<mode>2): Likewise.

Diff:
---
 gcc/config/rs6000/rs6000-builtin.cc |  2 +-
 gcc/config/rs6000/rs6000.cc         |  8 ++++----
 gcc/config/rs6000/rs6000.h          | 11 +++++++----
 gcc/config/rs6000/rs6000.md         | 10 +++++-----
 4 files changed, 17 insertions(+), 14 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-builtin.cc 
b/gcc/config/rs6000/rs6000-builtin.cc
index 9bdbae1ecf94..98a0545030cd 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -155,7 +155,7 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins 
fncode)
     case ENB_ALWAYS:
       return true;
     case ENB_P5:
-      return TARGET_POPCNTB;
+      return TARGET_POWER5;
     case ENB_P6:
       return TARGET_CMPB;
     case ENB_P6_64:
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 950fd947fda3..551676681f22 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -3924,7 +3924,7 @@ rs6000_option_override_internal (bool global_init_p)
     rs6000_isa_flags |= (ISA_2_5_MASKS_EMBEDDED & ~ignore_masks);
   else if (TARGET_FPRND)
     rs6000_isa_flags |= (ISA_2_4_MASKS & ~ignore_masks);
-  else if (TARGET_POPCNTB)
+  else if (TARGET_POWER5)
     rs6000_isa_flags |= (ISA_2_2_MASKS & ~ignore_masks);
   else if (TARGET_ALTIVEC)
     rs6000_isa_flags |= (OPTION_MASK_PPC_GFXOPT & ~ignore_masks);
@@ -23208,8 +23208,8 @@ rs6000_emit_swsqrt (rtx dst, rtx src, bool recip)
   return;
 }
 
-/* Emit popcount intrinsic on TARGET_POPCNTB (Power5) and TARGET_POPCNTD
-   (Power7) targets.  DST is the target, and SRC is the argument operand.  */
+/* Emit popcount intrinsic on TARGET_POWER5 and TARGET_POPCNTD (Power7)
+   targets.  DST is the target, and SRC is the argument operand.  */
 
 void
 rs6000_emit_popcount (rtx dst, rtx src)
@@ -23250,7 +23250,7 @@ rs6000_emit_popcount (rtx dst, rtx src)
 }
 
 
-/* Emit parity intrinsic on TARGET_POPCNTB targets.  DST is the
+/* Emit parity intrinsic on TARGET_POWER5 targets.  DST is the
    target, and SRC is the argument operand.  */
 
 void
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index d460eb065448..80d954e1178c 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -448,7 +448,7 @@ extern int rs6000_vector_align[];
    Enable 32-bit fcfid's on any of the switches for newer ISA machines.  */
 #define TARGET_FCFID   (TARGET_POWERPC64                               \
                         || TARGET_PPC_GPOPT    /* 970/power4 */        \
-                        || TARGET_POPCNTB      /* ISA 2.02 */          \
+                        || TARGET_POWER5       /* ISA 2.02 */          \
                         || TARGET_CMPB         /* ISA 2.05 */          \
                         || TARGET_POPCNTD)     /* ISA 2.06 */
 
@@ -501,6 +501,9 @@ extern int rs6000_vector_align[];
 #define TARGET_MINMAX  (TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT         \
                         && (TARGET_P9_MINMAX || !flag_trapping_math))
 
+/* Convert ISA bits like POPCNTB to PowerPC processors like POWER5.  */
+#define TARGET_POWER5          TARGET_POPCNTB
+
 /* In switching from using target_flags to using rs6000_isa_flags, the options
    machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>.  The MASK_<xxxx>
    options that have not yet been replaced by their OPTION_MASK_<xxx>
@@ -527,7 +530,7 @@ extern int rs6000_vector_align[];
 
 #define TARGET_EXTRA_BUILTINS  (TARGET_POWERPC64                        \
                                 || TARGET_PPC_GPOPT /* 970/power4 */    \
-                                || TARGET_POPCNTB   /* ISA 2.02 */      \
+                                || TARGET_POWER5    /* ISA 2.02 */      \
                                 || TARGET_CMPB      /* ISA 2.05 */      \
                                 || TARGET_POPCNTD   /* ISA 2.06 */      \
                                 || TARGET_ALTIVEC                       \
@@ -543,9 +546,9 @@ extern int rs6000_vector_align[];
 #define TARGET_FRES    (TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT)
 
 #define TARGET_FRE     (TARGET_HARD_FLOAT \
-                        && (TARGET_POPCNTB || VECTOR_UNIT_VSX_P (DFmode)))
+                        && (TARGET_POWER5 || VECTOR_UNIT_VSX_P (DFmode)))
 
-#define TARGET_FRSQRTES        (TARGET_HARD_FLOAT && TARGET_POPCNTB \
+#define TARGET_FRSQRTES        (TARGET_HARD_FLOAT && TARGET_POWER5 \
                         && TARGET_PPC_GFXOPT)
 
 #define TARGET_FRSQRTE (TARGET_HARD_FLOAT \
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 8eda2f7bb0d7..266bb9abb203 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -379,7 +379,7 @@
      (const_int 1)
 
      (and (eq_attr "isa" "p5")
-         (match_test "TARGET_POPCNTB"))
+         (match_test "TARGET_POWER5"))
      (const_int 1)
 
      (and (eq_attr "isa" "p6")
@@ -2510,7 +2510,7 @@
 (define_expand "popcount<mode>2"
   [(set (match_operand:GPR 0 "gpc_reg_operand")
        (popcount:GPR (match_operand:GPR 1 "gpc_reg_operand")))]
-  "TARGET_POPCNTB || TARGET_POPCNTD"
+  "TARGET_POWER5"
 {
   rs6000_emit_popcount (operands[0], operands[1]);
   DONE;
@@ -2520,7 +2520,7 @@
   [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
        (unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")]
                    UNSPEC_POPCNTB))]
-  "TARGET_POPCNTB"
+  "TARGET_POWER5"
   "popcntb %0,%1"
   [(set_attr "type" "popcnt")])
 
@@ -2535,7 +2535,7 @@
 (define_expand "parity<mode>2"
   [(set (match_operand:GPR 0 "gpc_reg_operand")
        (parity:GPR (match_operand:GPR 1 "gpc_reg_operand")))]
-  "TARGET_POPCNTB"
+  "TARGET_POWER5"
 {
   rs6000_emit_parity (operands[0], operands[1]);
   DONE;
@@ -2544,7 +2544,7 @@
 (define_insn "parity<mode>2_cmpb"
   [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
        (unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")] 
UNSPEC_PARITY))]
-  "TARGET_CMPB && TARGET_POPCNTB"
+  "TARGET_CMPB && TARGET_POWER5"
   "prty<wd> %0,%1"
   [(set_attr "type" "popcnt")])

Reply via email to