https://gcc.gnu.org/g:eef83c37e0c3acaa44cf3cfeaa96df7876500c66
commit eef83c37e0c3acaa44cf3cfeaa96df7876500c66
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Mon Aug 12 17:56:17 2024 -0400
Update ChangeLog.*
Diff:
---
gcc/ChangeLog.bugs | 68 ++++++++++++++++--------------------------------------
1 file changed, 20 insertions(+), 48 deletions(-)
diff --git a/gcc/ChangeLog.bugs b/gcc/ChangeLog.bugs
index 27759bef3284..2d6970807262 100644
--- a/gcc/ChangeLog.bugs
+++ b/gcc/ChangeLog.bugs
@@ -1,58 +1,30 @@
==================== Branch work175-bugs, patch #310 ====================
-Optimize vec_splats of vec_extract for V2DI/V2DF (PR target/99293)
+Add better support for shifting vectors with 64-bit elements
-This patch optimizes cases like:
-
- vector double v1, v2;
- /* ... */
- v2 = vec_splats (vec_extract (v1, 0); /* or */
- v2 = vec_splats (vec_extract (v1, 1);
-
-Previously:
-
- vector long long
- splat_dup_l_0 (vector long long v)
- {
- return __builtin_vec_splats (__builtin_vec_extract (v, 0));
- }
-
-would generate:
-
- mfvsrld 9,34
- mtvsrdd 34,9,9
- blr
-
-With this patch, GCC generates:
-
- xxpermdi 34,34,34,3
- blr
-
-
-I have tested this patch on the following systems and there was no degration.
-Can I check it into the trunk branch?
-
- * Power10, LE, --with-cpu=power10, IBM 128-bit long double
- * Power9, LE, --with-cpu=power9, IBM 128-bit long double
- * Power9, LE, --with-cpu=power9, IEEE 128-bit long double
- * Power9, LE, --with-cpu=power9, 64-bit default long double
- * Power9, BE, --with-cpu=power9, IBM 128-bit long double
- * Power8, BE, --with-cpu=power8, IBM 128-bit long double
+This patch fixes PR target/89213 to allow better code to be generated to do
+constant shifts of V2DI/V2DF vectors.
+[gcc]
2024-08-12 Michael Meissner <meiss...@linux.ibm.com>
-gcc/
-
- PR target/99293
- * gcc/config/rs6000/vsx.md (vsx_splat_extract_<mode>): New combiner
- insn.
-
-gcc/testsuite/
-
- PR target/108958
- * gcc.target/powerpc/pr99293.c: New test.
- * gcc.target/powerpc/builtins-1.c: Update insn count.
+ PR target/89213
+ * config/rs6000/altivec.md (UNSPEC_VECTOR_SHIFT): New unspec.
+ (VSHIFT_MODE): New mode iterator.
+ (vshift_code): New code iterator.
+ (vshift_attr): New code attribute.
+ (altivec_<mode>_<vshift_attr>_const): New pattern to optimize
+ vector long long/int shifts by a constant.
+ (altivec_<mode>_shift_const): New helper insn to load up a
+ constant used by the shift operation.
+ * config/rs6000/predicates.md (vector_shift_constant): New
+ predicate.
+
+[gcc/testsuite]
+2024-08-12 Michael Meissner <meiss...@linux.ibm.com>
+ PR target/89213
+ * gcc.target/powerpc/pr89213.c: New test.
==================== Branch work175-bugs, patch #303 ====================
