https://gcc.gnu.org/g:34c54380d9e75419800af47d5c0a26b1bb045bd1
commit 34c54380d9e75419800af47d5c0a26b1bb045bd1
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Mon Jun 10 18:01:50 2024 -0400
Update ChangeLog.*
Diff:
---
gcc/ChangeLog.tar | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/gcc/ChangeLog.tar b/gcc/ChangeLog.tar
index a69b0f59eac..ec645be708f 100644
--- a/gcc/ChangeLog.tar
+++ b/gcc/ChangeLog.tar
@@ -1,3 +1,21 @@
+==================== Branch work168-tar, patch #202 ====================
+
+Add options for modes in SPR registers.
+
+2024-06-10 Michael Meissner <meiss...@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Add
+ support for -m{cc,qi,hi,si,sf,df}spr.
+ (rs6000_debug_reg_global): Print out SPR mode options.
+ * config/rs6000/rs6000.opt (-mccspr): New option.
+ (-mqispr): Likewise.
+ (-mhispr): Likewise.
+ (-msispr): Likewise.
+ (-msfspr): Likewise.
+ (-mdfspr): Likewise.
+
==================== Branch work168-tar, patch #201 ====================
Add support for the TAR register.
