https://gcc.gnu.org/g:414c4437358308f8dcc349b6be15977bdb7af487
commit 414c4437358308f8dcc349b6be15977bdb7af487
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Tue May 14 13:46:50 2024 -0400
Update ChangeLog.*
Diff:
---
gcc/ChangeLog.tar | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/gcc/ChangeLog.tar b/gcc/ChangeLog.tar
index 3e4684c22019..ad0c80ed7acc 100644
--- a/gcc/ChangeLog.tar
+++ b/gcc/ChangeLog.tar
@@ -1,3 +1,20 @@
+==================== Branch work165-tar, patch #204 ====================
+
+Add -mintspr. Default -mtar for power10, not power9.
+
+2024-05-14 Michael Meissner <meiss...@linux.ibm.com>
+
+ * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Don't set TAR
+ options here.
+ (OTHER_POWER10_MASKS): Set TAR options here. Add -mintspr.
+ (POWERPC_MASKS): Add -mintspr.
+ * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Add
+ support for -mintspr.
+ (rs6000_option_override_internal): Require -mcpu=power9 or -mcpu=power10
+ to use -mtar.
+ (rs6000_opt_masks): Add -mmfspr and -mintspr.
+ * config/rs6000/rs6000.opt (-mintspr): New option.
+
==================== Branch work165-tar, patch #203 ====================
Limit SPR registers to hold only DImode/SImode.
