[gcc(refs/users/meissner/heads/work165-tar)] Update ChangeLog.*

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:270b6fcfb2327764ddcac74d4c3eaa7888a5933b

commit 270b6fcfb2327764ddcac74d4c3eaa7888a5933b
Author: Michael Meissner <meiss...@linux.ibm.com>
Date:   Wed May 8 12:27:17 2024 -0400

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.tar | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/gcc/ChangeLog.tar b/gcc/ChangeLog.tar
index 20a4ff5e6043..3e4684c22019 100644
--- a/gcc/ChangeLog.tar
+++ b/gcc/ChangeLog.tar
@@ -1,3 +1,12 @@
+==================== Branch work165-tar, patch #203 ====================
+
+Limit SPR registers to hold only DImode/SImode.
+
+2024-05-08  Michael Meissner  <meiss...@linux.ibm.com>
+
+       * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Limit
+       SPR registers to only hold SImode/DImode.
+
 ==================== Branch work165-tar, patch #202 ====================
 
 Add -mfspr option.