[Bug target/128242] New: Incorrect handling of vector shift counts with widening shifts on RISC-V

[law at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=128242

            Bug ID: 128242
           Summary: Incorrect handling of vector shift counts with
                    widening shifts on RISC-V
           Product: gcc
           Version: 17.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: law at gcc dot gnu.org
  Target Milestone: ---

This was LLM discovered.  So take with a grain of salt, but with light review
it seems valid to me.  Compile with -march=rv64gcbv_zvbb -O3 to trigger:

__attribute__ ((noinline, noclone)) void
g (unsigned short *d, unsigned char *a, unsigned char s, int n)
{
  for (int i = 0; i < n; i++)
    d[i] = (unsigned short) (a[i] << s);
}

volatile unsigned char A[16], S = 16;
unsigned short D[16];

int
main (void)
{
  unsigned char a[16];
  for (int i = 0; i < 16; i++)
    A[i] = 0x81;
  for (int i = 0; i < 16; i++)
    a[i] = A[i];
  g (D, a, S, 16);
  /* a << 16 truncated to 16 bits is 0.  */
  if (D[0] != 0)
    __builtin_abort ();
  __builtin_exit (0);
}