https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119040
--- Comment #8 from Segher Boessenkool <segher at gcc dot gnu.org> ---
(In reply to Jeevitha from comment #7)
> (In reply to Segher Boessenkool from comment #6)
> > Not only do mask1 and mask have to be non-overlapping, they have to be each
> > other's complement, even. A select instruction takes every bit out of one
> > of the two operands, always. If both inputs have that bit a zero always, it
> > does not matter whether we pick 0 or 1 for the mask there, but we still have
> > to pick one of the two :-)
>
> Right, I'm checking whether the two constant vectors are exact bitwise
> complements of each other.
Then you do not want to use rs6000_vector_masks_overlap_p at all.
> For each lane, I verify the complement property as follows:
>
> for (int i = 0; i < CONST_VECTOR_NUNITS (op3); i++)
> {
> HOST_WIDE_INT v3 = INTVAL (CONST_VECTOR_ELT (op3, i));
> HOST_WIDE_INT v4 = INTVAL (CONST_VECTOR_ELT (op4, i));
>
> if ((v3 ^ v4) != -1)
(Superfluous and thus potentially misleading braces)
> return false;
> }
>
>
> If all lanes satisfy (v3 ^ v4) == -1, then the two masks are perfect
> complements.
Cute :-) Each side is sign-extended, but all that works out just fine.
Why do you do this per lane though? You can just do this for everything
together?
> This ensures there are no overlapping bits and that each bit position
> cleanly selects either operand a or operand b, which is a requirement for
> forming a valid vsel.
>
> Is this fine?
Patches are not reviewed in BZ, but have to be posted to the ML.
It sounds promising though, if that is what you meant :-)
