[Bug target/121959] riscv: vector sign extend instead of zero extend

[rdapp at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121959

--- Comment #4 from Robin Dapp <rdapp at gcc dot gnu.org> ---
The signed short type comes from vect_recog_over_widening_pattern:

  /* We've found a viable pattern.  Get the new type of the operation.  */
  bool unsigned_p = (last_stmt_info->operation_sign == UNSIGNED);
  tree new_type = build_nonstandard_integer_type (new_precision, unsigned_p);

Setting unsigned_p = true here gets the desired assembly (but is wrong in
general).