https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93738
--- Comment #16 from Kishan Parmar <kishan at gcc dot gnu.org> --- (In reply to Segher Boessenkool from comment #15) > (In reply to Kishan Parmar from comment #13) > > Operand of 10 gets converted to below insn > > > > (and:SI (subreg:SI (lshiftrt:DI (reg:DI 129 [ x+-4 ]) > > (const_int 12 [0xc])) 4) > > (const_int 3840 [0xf00])) > > And that is not optimised. simplify-rtx should move the subreg further in, > but it apparently doesn't. I was wondering the same, But it seems to canonicalize form. from simplify-rtx.c, 4531 canonicalize_shift: 4532 /* Given: 4533 scalar modes M1, M2 4534 scalar constants c1, c2 4535 size (M2) > size (M1) 4536 c1 == size (M2) - size (M1) 4537 optimize: 4538 ([a|l]shiftrt:M1 (subreg:M1 (lshiftrt:M2 (reg:M2) (const_int <c1>)) 4539 <low_part>) 4540 (const_int <c2>)) 4541 to: 4542 (subreg:M1 ([a|l]shiftrt:M2 (reg:M2) (const_int <c1 + c2>)) 4543 <low_part>). */ Apart from this, i notice that other arch like ia64, aarch64, etc.. lowers zero_extract to respective bit-field extract insns.. should we do the same for rs6000?
