https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93738
Kishan Parmar <kishan at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
--- Comment #11 from Kishan Parmar <kishan at gcc dot gnu.org> ---
The issue is actually in the combine pass, not the reload pass.
In the combine pass, GCC tries to merge three instructions shift, AND, and OR
into a single rotate-and-insert instruction. This works by recognizing a
specific pattern. However, this pattern is failing to match in some cases, and
we end up with two separate instructions: one for rotate and another for
insert.
When a function has a primitive-type argument (like int, unsigned int), the
incoming argument is typically in DI mode. Later in the RTL, GCC uses a subreg
to extract the 32 bits, resulting in an SI mode operand.
Previously, before r9-3594 patch, combine would often see subregs of hard
registers (e.g., subreg:SI (reg:DI ...) directly referencing hardware
registers).
However, after patch, which intentionally introduces extra pseudo-to-pseudo
moves for parameter and return registers to improve register allocation the
situation changed. Now we often have a subreg of a pseudo register, IN BE it is
being transformed into a zero_extract expression. and GCC is failing there to
match pattern.
