[Bug tree-optimization/120922] [16 Regression] RISC-V: ICE during GIMPLE pass: vect in verify_range with -mrvv-max-lmul=m8

[rdapp at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120922

--- Comment #6 from Robin Dapp <rdapp at gcc dot gnu.org> ---
(In reply to Tamar Christina from comment #5)
> Question, can I count on
> 
> -march=rv64gcv_zvl1024b -mrvv-vector-bits=zvl -mrvv-max-lmul=m8
> 
> always being available as a codegen option for RVV? or do I need some
> require-effective-target checks?

For a compile test?  Yes, that should always be available.
To be extra sure you can add a target riscv_v.