https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120672
Bug ID: 120672 Summary: Failure to fold BIC+PTEST to BICS for SVE Product: gcc Version: 15.1.0 Status: UNCONFIRMED Keywords: aarch64-sve, missed-optimization Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: sabson at gcc dot gnu.org Target Milestone: --- Target: aarch64*-*-* #include <arm_sve.h> int bar (svbool_t a, svbool_t b) { svbool_t c = svptrue_b8(); return svptest_first (c, svbic_z (c, a, b)); } generates: bar: ptrue p3.b, all not p0.b, p0/z, p1.b ptest p3, p0.b cset w0, first ret instead of LLVM's bar: ptrue p2.b bics p0.b, p2/z, p0.b, p1.b cset w0, mi ret Because the idiom for predicated BIC: (and (and (not (b)) (a)) (c)) ; aarch64_pred_bicvnx16bi_z is folded to that for predicated NOT: (and (not (b)) (a)) ; one_cmplvnx16bi3 When c is an all-ones value. We then miss the combiner patterns that target BIC+PTEST. Please check the "see also" for a closely related issue.