https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120671

            Bug ID: 120671
           Summary: Failure to fold AND+PTEST to ANDS for SVE
           Product: gcc
           Version: 15.1.0
            Status: UNCONFIRMED
          Keywords: aarch64-sve, missed-optimization
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: sabson at gcc dot gnu.org
  Target Milestone: ---
            Target: aarch64*-*-*

#include  <arm_sve.h>

int
bar (svbool_t a, svbool_t b)
{
  svbool_t c = svptrue_b8();
  return svptest_first (c, svand_z (c, a, b));
}

generates:

bar:
        ptrue   p3.b, all
        and     p0.b, p0/z, p1.b, p1.b
        ptest   p3, p0.b
        cset    w0, first
        ret

instead of LLVM's

bar:
        ptrue   p2.b
        ands    p0.b, p2/z, p0.b, p1.b
        cset    w0, mi
        ret


Because the idiom for predicated AND:

(and (and (a) (b)) (c))         ; aarch64_pred_andvnx16bi_z

Is folded to that for unpredicated AND (see pattern description):

(and (a) (b))                   ; andvnx16bi3

When c is an all-ones value.  We then miss the combiner patterns that
target AND+PTEST.

Note that we could always get rid of the PTRUE and PTEST here if we
were testing for any/none (CC_Z), which is linked to
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118151.

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