https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120362
--- Comment #4 from Robin Dapp <rdapp at gcc dot gnu.org> --- > I see, but when I changed to > > addi a5,a5,912 > > aka load from 0xdd390, the board still has the illegal insn. 0xdd390 is > aligned for -O2 -march=rv64gcv -mrvv-vector-bits=zvl build, right? Hmm, right, I was mistaken. The original one (904) also is not element misaligned (for 32-bit = 4 byte elements). So no alignment issue. Is it a vsetvl problem? We added vsetvl handling for full-register moves, do we also need it for full-register loads and stores?
