https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120362
--- Comment #2 from Li Pan <pan2.li at intel dot com> --- (In reply to Robin Dapp from comment #1) > That's a misaligned vector load I suppose? I see, but when I changed to addi a5,a5,912 aka load from 0xdd390, the board still has the illegal insn. 0xdd390 is aligned for -O2 -march=rv64gcv -mrvv-vector-bits=zvl build, right?
