[Bug target/117990] [15] RISC-V: Miscompile at -O3 zvl 256 since r15-4746-g30435cc2610

[patrick at rivosinc dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117990

--- Comment #1 from Patrick O'Neill <patrick at rivosinc dot com> ---
-flto can be replaced with -fwhole-program:

-march=rv64gcv_zvl256b -fwhole-program -O3 -mrvv-vector-bits=zvl test.c -o
user-config.out