[Bug target/117990] New: [15] RISC-V: Miscompile at -O3 zvl 256 since r15-4746-g30435cc2610

[patrick at rivosinc dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117990

            Bug ID: 117990
           Summary: [15] RISC-V: Miscompile at -O3 zvl 256 since
                    r15-4746-g30435cc2610
           Product: gcc
           Version: 15.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: patrick at rivosinc dot com
  Target Milestone: ---

Testcase:
long long a;
int b = 1;
char c = 3;
char d[225];
int e[15];
int main() {
  for (long h = 0; h < 15; ++h)
    d[h * 15] = 9;
  for (int h = c; h < 15; h += b)
    e[h] = d[h * 15];
  if (e[5] != 9)
    return 1;
}

Commands:
> /scratch/tc-testing/tc-compiler-fuzz-bisect/build-rv64gcv/bin/riscv64-unknown-linux-gnu-gcc
>  -march=rv64gcv_zvl256b -flto -O3 -mrvv-vector-bits=zvl test.c -o 
> user-config.out
> QEMU_CPU=rv64,vlen=256,rvv_ta_all_1s=true,rvv_ma_all_1s=true,v=true,vext_spec=v1.0,zve32f=true,zve32x=true,zve64d=true,zve64f=true,zve64x=true
>  /scratch/tc-testing/tc-compiler-fuzz-trunk/build-gcv/bin/qemu-riscv64 
> user-config.out

Found via fuzzer.

First bad commit: r15-4746-g30435cc2610