https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114978
--- Comment #9 from Xi Ruoyao <xry111 at gcc dot gnu.org> --- (In reply to chenglulu from comment #8) > diff --git a/gcc/config/loongarch/loongarch-def.cc > b/gcc/config/loongarch/loongarch-def.cc > index e8c129ce643..f27284cb20a 100644 > --- a/gcc/config/loongarch/loongarch-def.cc > +++ b/gcc/config/loongarch/loongarch-def.cc > @@ -111,11 +111,7 @@ loongarch_rtx_cost_data::loongarch_rtx_cost_data () > tune targets (i.e. -mtune=native while PRID does not correspond to > any known "-mtune" type). */ > array_tune<loongarch_rtx_cost_data> loongarch_cpu_rtx_cost_data = > - array_tune<loongarch_rtx_cost_data> () > - .set (CPU_LA664, > - loongarch_rtx_cost_data () > - .movcf2gr_ (COSTS_N_INSNS (1)) > - .movgr2cf_ (COSTS_N_INSNS (1))); > + array_tune<loongarch_rtx_cost_data> (); But why? Isn't movcf2gr and movgr2cf one-cycle on LA664?
