[Bug target/112813] [14 Regression] RISCV ICE: vsetvl pass: in merge at config/riscv/riscv-vsetvl.cc:1968 on rv32gcv_zvl256b

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112813

--- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <pa...@gcc.gnu.org>:

https://gcc.gnu.org/g:462ccc3b9d5625cdc6104322a417bcd1ff1a8ff4

commit r14-6110-g462ccc3b9d5625cdc6104322a417bcd1ff1a8ff4
Author: Pan Li <pan2...@intel.com>
Date:   Mon Dec 4 16:06:14 2023 +0800

    RISC-V: Add test case for bug PR112813

    The bugzilla 112813 has been fixed recently, add below test
    case for the bug.

            PR target/112813

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/vsetvl/pr112813-1.c: New test.

    Signed-off-by: Pan Li <pan2...@intel.com>