https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112648
--- Comment #3 from Jeremy Bennett <jeremy.bennett at embecosm dot com> --- Following a discussion on the weekly call, it seems that I have misunderstood the purpose of this parameter. It seems it is a hint to the optimizer that a particular LMUL value is most efficient, not as a mandate to only use that LMUL value. I have raised Bug 112650 to update the GCC documentation for RISC-V parameters. Once the behavior is confirmed, this bug can be closed. I shall also update Bug 112651, since there is a need to force LMUL to particular values for chips which do not implement all LMUL values.
